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mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gt
Add ID, flags, and fixup for s25hl02gt and s25hs02gt. These parts are - Dual-die package parts - Not support chip erase - 4-byte addressing mode by default - Wrong param in SCCR map that needs to be fixed Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/55021d2409bf310692db0ac1c55e71ba406438a7.1680849425.git.Takahiro.Kuwano@infineon.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
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@ -579,6 +579,10 @@ static int s25hx_t_post_sfdp_fixup(struct spi_nor *nor)
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}
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}
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/* The 2 Gb parts duplicate info and advertise 4 dice instead of 2. */
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if (nor->params->size == SZ_256M)
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nor->params->n_dice = 2;
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return cypress_nor_get_page_size(nor);
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}
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@ -797,6 +801,10 @@ static const struct flash_info spansion_nor_parts[] = {
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PARSE_SFDP
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MFR_FLAGS(USE_CLSR)
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.fixups = &s25hx_t_fixups },
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{ "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0)
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PARSE_SFDP
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FLAGS(NO_CHIP_ERASE)
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.fixups = &s25hx_t_fixups },
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{ "s25hs512t", INFO6(0x342b1a, 0x0f0390, 256 * 1024, 256)
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PARSE_SFDP
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MFR_FLAGS(USE_CLSR)
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@ -805,6 +813,10 @@ static const struct flash_info spansion_nor_parts[] = {
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PARSE_SFDP
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MFR_FLAGS(USE_CLSR)
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.fixups = &s25hx_t_fixups },
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{ "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0)
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PARSE_SFDP
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FLAGS(NO_CHIP_ERASE)
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.fixups = &s25hx_t_fixups },
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{ "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1)
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FLAGS(SPI_NOR_NO_ERASE) },
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{ "s28hl512t", INFO(0x345a1a, 0, 256 * 1024, 256)
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