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net: phy: icplus: use the .soft_reset() of the phy-core
The PHY core already resets the PHY before .config_init() if a .soft_reset() op is registered. Drop the open-coded ip1xx_reset(). Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -120,36 +120,10 @@ static int ip175c_config_init(struct phy_device *phydev)
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return 0;
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}
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static int ip1xx_reset(struct phy_device *phydev)
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{
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int bmcr;
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/* Software Reset PHY */
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bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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bmcr |= BMCR_RESET;
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bmcr = phy_write(phydev, MII_BMCR, bmcr);
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if (bmcr < 0)
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return bmcr;
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do {
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bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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} while (bmcr & BMCR_RESET);
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return 0;
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}
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static int ip1001_config_init(struct phy_device *phydev)
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{
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int c;
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c = ip1xx_reset(phydev);
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if (c < 0)
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return c;
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/* Enable Auto Power Saving mode */
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c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
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if (c < 0)
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@ -237,10 +211,6 @@ static int ip101a_g_config_init(struct phy_device *phydev)
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struct ip101a_g_phy_priv *priv = phydev->priv;
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int err, c;
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c = ip1xx_reset(phydev);
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if (c < 0)
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return c;
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/* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */
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switch (priv->sel_intr32) {
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case IP101GR_SEL_INTR32_RXER:
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@ -346,6 +316,7 @@ static struct phy_driver icplus_driver[] = {
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.name = "ICPlus IP1001",
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/* PHY_GBIT_FEATURES */
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.config_init = ip1001_config_init,
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.soft_reset = genphy_soft_reset,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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@ -356,6 +327,7 @@ static struct phy_driver icplus_driver[] = {
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.config_intr = ip101a_g_config_intr,
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.handle_interrupt = ip101a_g_handle_interrupt,
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.config_init = ip101a_g_config_init,
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.soft_reset = genphy_soft_reset,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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} };
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