net: phy: icplus: use the .soft_reset() of the phy-core

The PHY core already resets the PHY before .config_init() if a
.soft_reset() op is registered. Drop the open-coded ip1xx_reset().

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Walle 2021-02-11 08:47:45 +01:00 committed by David S. Miller
parent 8edf206cc2
commit df22de9a6f

View File

@ -120,36 +120,10 @@ static int ip175c_config_init(struct phy_device *phydev)
return 0;
}
static int ip1xx_reset(struct phy_device *phydev)
{
int bmcr;
/* Software Reset PHY */
bmcr = phy_read(phydev, MII_BMCR);
if (bmcr < 0)
return bmcr;
bmcr |= BMCR_RESET;
bmcr = phy_write(phydev, MII_BMCR, bmcr);
if (bmcr < 0)
return bmcr;
do {
bmcr = phy_read(phydev, MII_BMCR);
if (bmcr < 0)
return bmcr;
} while (bmcr & BMCR_RESET);
return 0;
}
static int ip1001_config_init(struct phy_device *phydev)
{
int c;
c = ip1xx_reset(phydev);
if (c < 0)
return c;
/* Enable Auto Power Saving mode */
c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
if (c < 0)
@ -237,10 +211,6 @@ static int ip101a_g_config_init(struct phy_device *phydev)
struct ip101a_g_phy_priv *priv = phydev->priv;
int err, c;
c = ip1xx_reset(phydev);
if (c < 0)
return c;
/* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */
switch (priv->sel_intr32) {
case IP101GR_SEL_INTR32_RXER:
@ -346,6 +316,7 @@ static struct phy_driver icplus_driver[] = {
.name = "ICPlus IP1001",
/* PHY_GBIT_FEATURES */
.config_init = ip1001_config_init,
.soft_reset = genphy_soft_reset,
.suspend = genphy_suspend,
.resume = genphy_resume,
}, {
@ -356,6 +327,7 @@ static struct phy_driver icplus_driver[] = {
.config_intr = ip101a_g_config_intr,
.handle_interrupt = ip101a_g_handle_interrupt,
.config_init = ip101a_g_config_init,
.soft_reset = genphy_soft_reset,
.suspend = genphy_suspend,
.resume = genphy_resume,
} };