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ocxl: Don't return trigger page when allocating an interrupt
Existing users of ocxl_link_irq_alloc() have been converted to obtain the trigger page of an interrupt through xive directly, we therefore have no need to return the trigger page when allocating an interrupt. It also allows ocxl to use the xive native interface to allocate interrupts, instead of its custom service. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Acked-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200403153838.29224-4-fbarrat@linux.ibm.com
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@ -9,7 +9,7 @@ config OCXL_BASE
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config OCXL
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tristate "OpenCAPI coherent accelerator support"
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depends on PPC_POWERNV && PCI && EEH
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depends on PPC_POWERNV && PCI && EEH && PPC_XIVE_NATIVE
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select OCXL_BASE
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select HOTPLUG_PCI_POWERNV
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default m
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@ -11,7 +11,6 @@ struct afu_irq {
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int hw_irq;
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unsigned int virq;
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char *name;
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u64 trigger_page;
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irqreturn_t (*handler)(void *private);
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void (*free_private)(void *private);
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void *private;
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@ -125,8 +124,7 @@ int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id)
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goto err_unlock;
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}
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rc = ocxl_link_irq_alloc(ctx->afu->fn->link, &irq->hw_irq,
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&irq->trigger_page);
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rc = ocxl_link_irq_alloc(ctx->afu->fn->link, &irq->hw_irq);
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if (rc)
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goto err_idr;
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@ -6,6 +6,7 @@
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#include <linux/mmu_context.h>
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#include <asm/copro.h>
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#include <asm/pnv-ocxl.h>
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#include <asm/xive.h>
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#include <misc/ocxl.h>
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#include "ocxl_internal.h"
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#include "trace.h"
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@ -682,23 +683,21 @@ unlock:
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}
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EXPORT_SYMBOL_GPL(ocxl_link_remove_pe);
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int ocxl_link_irq_alloc(void *link_handle, int *hw_irq, u64 *trigger_addr)
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int ocxl_link_irq_alloc(void *link_handle, int *hw_irq)
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{
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struct ocxl_link *link = (struct ocxl_link *) link_handle;
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int rc, irq;
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u64 addr;
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int irq;
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if (atomic_dec_if_positive(&link->irq_available) < 0)
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return -ENOSPC;
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rc = pnv_ocxl_alloc_xive_irq(&irq, &addr);
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if (rc) {
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irq = xive_native_alloc_irq();
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if (!irq) {
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atomic_inc(&link->irq_available);
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return rc;
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return -ENXIO;
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}
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*hw_irq = irq;
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*trigger_addr = addr;
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return 0;
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}
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EXPORT_SYMBOL_GPL(ocxl_link_irq_alloc);
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@ -707,7 +706,7 @@ void ocxl_link_free_irq(void *link_handle, int hw_irq)
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{
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struct ocxl_link *link = (struct ocxl_link *) link_handle;
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pnv_ocxl_free_xive_irq(hw_irq);
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xive_native_free_irq(hw_irq);
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atomic_inc(&link->irq_available);
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}
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EXPORT_SYMBOL_GPL(ocxl_link_free_irq);
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@ -614,7 +614,6 @@ static int alloc_afu_irqs(struct ocxlflash_context *ctx, int num)
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struct ocxl_hw_afu *afu = ctx->hw_afu;
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struct device *dev = afu->dev;
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struct ocxlflash_irqs *irqs;
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u64 addr;
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int rc = 0;
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int hwirq;
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int i;
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@ -639,7 +638,7 @@ static int alloc_afu_irqs(struct ocxlflash_context *ctx, int num)
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}
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for (i = 0; i < num; i++) {
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rc = ocxl_link_irq_alloc(afu->link_token, &hwirq, &addr);
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rc = ocxl_link_irq_alloc(afu->link_token, &hwirq);
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if (unlikely(rc)) {
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dev_err(dev, "%s: ocxl_link_irq_alloc failed rc=%d\n",
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__func__, rc);
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@ -460,14 +460,8 @@ int ocxl_link_remove_pe(void *link_handle, int pasid);
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* Allocate an AFU interrupt associated to the link.
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*
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* 'hw_irq' is the hardware interrupt number
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* 'obj_handle' is the 64-bit object handle to be passed to the AFU to
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* trigger the interrupt.
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* On P9, 'obj_handle' is an address, which, if written, triggers the
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* interrupt. It is an MMIO address which needs to be remapped (one
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* page).
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*/
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int ocxl_link_irq_alloc(void *link_handle, int *hw_irq,
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u64 *obj_handle);
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int ocxl_link_irq_alloc(void *link_handle, int *hw_irq);
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/*
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* Free a previously allocated AFU interrupt
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