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irqchip/mips-gic: Get rid of the reliance on irq_cpu_online()
The MIPS GIC driver uses irq_cpu_online() to go and program the per-CPU interrupts. However, this method iterates over all IRQs in the system, despite only 3 per-CPU interrupts being of interest. Let's be terribly bold and do the iteration ourselves. To ensure mutual exclusion, hold the gic_lock spinlock that is otherwise taken while dealing with these interrupts. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Tested-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20211021170414.3341522-3-maz@kernel.org
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eb5411334c
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dd098a0e03
@ -381,24 +381,35 @@ static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
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spin_unlock_irqrestore(&gic_lock, flags);
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spin_unlock_irqrestore(&gic_lock, flags);
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}
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}
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static void gic_all_vpes_irq_cpu_online(struct irq_data *d)
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static void gic_all_vpes_irq_cpu_online(void)
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{
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{
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struct gic_all_vpes_chip_data *cd;
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static const unsigned int local_intrs[] = {
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unsigned int intr;
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GIC_LOCAL_INT_TIMER,
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GIC_LOCAL_INT_PERFCTR,
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GIC_LOCAL_INT_FDC,
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};
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unsigned long flags;
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int i;
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intr = GIC_HWIRQ_TO_LOCAL(d->hwirq);
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spin_lock_irqsave(&gic_lock, flags);
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cd = irq_data_get_irq_chip_data(d);
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write_gic_vl_map(mips_gic_vx_map_reg(intr), cd->map);
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for (i = 0; i < ARRAY_SIZE(local_intrs); i++) {
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if (cd->mask)
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unsigned int intr = local_intrs[i];
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write_gic_vl_smask(BIT(intr));
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struct gic_all_vpes_chip_data *cd;
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cd = &gic_all_vpes_chip_data[intr];
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write_gic_vl_map(mips_gic_vx_map_reg(intr), cd->map);
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if (cd->mask)
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write_gic_vl_smask(BIT(intr));
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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}
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}
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static struct irq_chip gic_all_vpes_local_irq_controller = {
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static struct irq_chip gic_all_vpes_local_irq_controller = {
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.name = "MIPS GIC Local",
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.name = "MIPS GIC Local",
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.irq_mask = gic_mask_local_irq_all_vpes,
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.irq_mask = gic_mask_local_irq_all_vpes,
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.irq_unmask = gic_unmask_local_irq_all_vpes,
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.irq_unmask = gic_unmask_local_irq_all_vpes,
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.irq_cpu_online = gic_all_vpes_irq_cpu_online,
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};
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};
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static void __gic_irq_dispatch(void)
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static void __gic_irq_dispatch(void)
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@ -477,6 +488,10 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
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intr = GIC_HWIRQ_TO_LOCAL(hwirq);
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intr = GIC_HWIRQ_TO_LOCAL(hwirq);
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map = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin;
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map = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin;
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/*
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* If adding support for more per-cpu interrupts, keep the the
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* array in gic_all_vpes_irq_cpu_online() in sync.
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*/
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switch (intr) {
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switch (intr) {
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case GIC_LOCAL_INT_TIMER:
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case GIC_LOCAL_INT_TIMER:
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/* CONFIG_MIPS_CMP workaround (see __gic_init) */
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/* CONFIG_MIPS_CMP workaround (see __gic_init) */
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@ -663,8 +678,8 @@ static int gic_cpu_startup(unsigned int cpu)
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/* Clear all local IRQ masks (ie. disable all local interrupts) */
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/* Clear all local IRQ masks (ie. disable all local interrupts) */
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write_gic_vl_rmask(~0);
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write_gic_vl_rmask(~0);
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/* Invoke irq_cpu_online callbacks to enable desired interrupts */
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/* Enable desired interrupts */
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irq_cpu_online();
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gic_all_vpes_irq_cpu_online();
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return 0;
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return 0;
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}
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}
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