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ath9k_hw: Read and configure turnning caps to regulate freq accuracy
Right now it is done for only AR9485, will be done for ar9003 also after proper testing. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -3737,6 +3737,20 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
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}
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static void ar9003_hw_apply_tuning_caps(struct ath_hw *ah)
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{
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struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
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u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
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if (eep->baseEepHeader.featureEnable & 0x40) {
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tuning_caps_param &= 0x7f;
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REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
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tuning_caps_param);
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REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPOUTDAC,
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tuning_caps_param);
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}
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}
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static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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@ -3745,6 +3759,8 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
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ar9003_hw_drive_strength_apply(ah);
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ar9003_hw_atten_apply(ah, chan);
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ar9003_hw_internal_regulator_apply(ah);
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if (AR_SREV_9485(ah))
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ar9003_hw_apply_tuning_caps(ah);
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}
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static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
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@ -598,6 +598,12 @@
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#define AR_CH0_TOP2_XPABIASLVL 0xf000
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#define AR_CH0_TOP2_XPABIASLVL_S 12
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#define AR_CH0_XTAL (AR_SREV_9485(ah) ? 0x16290 : 0x16294)
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#define AR_CH0_XTAL_CAPINDAC 0x7f000000
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#define AR_CH0_XTAL_CAPINDAC_S 24
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#define AR_CH0_XTAL_CAPOUTDAC 0x00fe0000
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#define AR_CH0_XTAL_CAPOUTDAC_S 17
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#define AR_PHY_PMU1 0x16c40
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#define AR_PHY_PMU1_PWD 0x1
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#define AR_PHY_PMU1_PWD_S 0
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