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IB/mlx5: Remove old FRWR API support
No ULP uses it anymore, go ahead and remove it. Keep only the local invalidate part of the handlers. Signed-off-by: Sagi Grimberg <sagig@mellanox.com> Acked-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -112,9 +112,6 @@ static enum ib_wc_opcode get_umr_comp(struct mlx5_ib_wq *wq, int idx)
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case IB_WR_REG_MR:
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return IB_WC_REG_MR;
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case IB_WR_FAST_REG_MR:
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return IB_WC_FAST_REG_MR;
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default:
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pr_warn("unknown completion status\n");
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return 0;
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@ -1426,8 +1426,6 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
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dev->ib_dev.process_mad = mlx5_ib_process_mad;
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dev->ib_dev.alloc_mr = mlx5_ib_alloc_mr;
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dev->ib_dev.map_mr_sg = mlx5_ib_map_mr_sg;
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dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
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dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
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dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
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dev->ib_dev.get_port_immutable = mlx5_port_immutable;
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@ -338,12 +338,6 @@ struct mlx5_ib_mr {
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void *descs_alloc;
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};
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struct mlx5_ib_fast_reg_page_list {
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struct ib_fast_reg_page_list ibfrpl;
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__be64 *mapped_page_list;
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dma_addr_t map;
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};
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struct mlx5_ib_umr_context {
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enum ib_wc_status status;
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struct completion done;
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@ -494,11 +488,6 @@ static inline struct mlx5_ib_mr *to_mmr(struct ib_mr *ibmr)
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return container_of(ibmr, struct mlx5_ib_mr, ibmr);
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}
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static inline struct mlx5_ib_fast_reg_page_list *to_mfrpl(struct ib_fast_reg_page_list *ibfrpl)
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{
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return container_of(ibfrpl, struct mlx5_ib_fast_reg_page_list, ibfrpl);
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}
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struct mlx5_ib_ah {
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struct ib_ah ibah;
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struct mlx5_av av;
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@ -569,9 +558,6 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd,
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int mlx5_ib_map_mr_sg(struct ib_mr *ibmr,
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struct scatterlist *sg,
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int sg_nents);
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struct ib_fast_reg_page_list *mlx5_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
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int page_list_len);
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void mlx5_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
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int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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const struct ib_wc *in_wc, const struct ib_grh *in_grh,
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const struct ib_mad_hdr *in, size_t in_mad_size,
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@ -1383,48 +1383,6 @@ err_free:
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return ERR_PTR(err);
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}
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struct ib_fast_reg_page_list *mlx5_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
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int page_list_len)
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{
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struct mlx5_ib_fast_reg_page_list *mfrpl;
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int size = page_list_len * sizeof(u64);
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mfrpl = kmalloc(sizeof(*mfrpl), GFP_KERNEL);
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if (!mfrpl)
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return ERR_PTR(-ENOMEM);
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mfrpl->ibfrpl.page_list = kmalloc(size, GFP_KERNEL);
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if (!mfrpl->ibfrpl.page_list)
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goto err_free;
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mfrpl->mapped_page_list = dma_alloc_coherent(ibdev->dma_device,
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size, &mfrpl->map,
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GFP_KERNEL);
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if (!mfrpl->mapped_page_list)
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goto err_free;
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WARN_ON(mfrpl->map & 0x3f);
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return &mfrpl->ibfrpl;
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err_free:
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kfree(mfrpl->ibfrpl.page_list);
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kfree(mfrpl);
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return ERR_PTR(-ENOMEM);
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}
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void mlx5_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
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{
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struct mlx5_ib_fast_reg_page_list *mfrpl = to_mfrpl(page_list);
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struct mlx5_ib_dev *dev = to_mdev(page_list->device);
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int size = page_list->max_page_list_len * sizeof(u64);
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dma_free_coherent(&dev->mdev->pdev->dev, size, mfrpl->mapped_page_list,
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mfrpl->map);
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kfree(mfrpl->ibfrpl.page_list);
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kfree(mfrpl);
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}
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int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
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struct ib_mr_status *mr_status)
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{
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@ -64,7 +64,6 @@ static const u32 mlx5_ib_opcode[] = {
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[IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA,
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[IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL,
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[IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR,
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[IB_WR_FAST_REG_MR] = MLX5_OPCODE_UMR,
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[IB_WR_REG_MR] = MLX5_OPCODE_UMR,
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[IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS,
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[IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA,
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@ -1908,20 +1907,11 @@ static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr,
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umr->mkey_mask = frwr_mkey_mask();
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}
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static void set_frwr_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
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struct ib_send_wr *wr, int li)
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static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
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{
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memset(umr, 0, sizeof(*umr));
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if (li) {
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umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
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umr->flags = 1 << 7;
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return;
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}
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umr->flags = (1 << 5); /* fail if not free */
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umr->klm_octowords = get_klm_octo(fast_reg_wr(wr)->page_list_len);
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umr->mkey_mask = frwr_mkey_mask();
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umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
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umr->flags = 1 << 7;
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}
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static __be64 get_umr_reg_mr_mask(void)
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@ -2015,24 +2005,10 @@ static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg,
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seg->log2_page_size = ilog2(mr->ibmr.page_size);
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}
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static void set_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr,
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int li, int *writ)
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static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg)
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{
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memset(seg, 0, sizeof(*seg));
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if (li) {
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seg->status = MLX5_MKEY_STATUS_FREE;
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return;
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}
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seg->flags = get_umr_flags(fast_reg_wr(wr)->access_flags) |
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MLX5_ACCESS_MODE_MTT;
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*writ = seg->flags & (MLX5_PERM_LOCAL_WRITE | IB_ACCESS_REMOTE_WRITE);
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seg->qpn_mkey7_0 = cpu_to_be32((fast_reg_wr(wr)->rkey & 0xff) | 0xffffff00);
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seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL);
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seg->start_addr = cpu_to_be64(fast_reg_wr(wr)->iova_start);
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seg->len = cpu_to_be64(fast_reg_wr(wr)->length);
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seg->xlt_oct_size = cpu_to_be32((fast_reg_wr(wr)->page_list_len + 1) / 2);
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seg->log2_page_size = fast_reg_wr(wr)->page_shift;
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seg->status = MLX5_MKEY_STATUS_FREE;
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}
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static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, struct ib_send_wr *wr)
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@ -2067,24 +2043,6 @@ static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg,
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dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
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}
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static void set_frwr_pages(struct mlx5_wqe_data_seg *dseg,
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struct ib_send_wr *wr,
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struct mlx5_core_dev *mdev,
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struct mlx5_ib_pd *pd,
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int writ)
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{
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struct mlx5_ib_fast_reg_page_list *mfrpl = to_mfrpl(fast_reg_wr(wr)->page_list);
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u64 *page_list = fast_reg_wr(wr)->page_list->page_list;
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u64 perm = MLX5_EN_RD | (writ ? MLX5_EN_WR : 0);
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int i;
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for (i = 0; i < fast_reg_wr(wr)->page_list_len; i++)
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mfrpl->mapped_page_list[i] = cpu_to_be64(page_list[i] | perm);
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dseg->addr = cpu_to_be64(mfrpl->map);
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dseg->byte_count = cpu_to_be32(ALIGN(sizeof(u64) * fast_reg_wr(wr)->page_list_len, 64));
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dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
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}
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static __be32 send_ieth(struct ib_send_wr *wr)
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{
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switch (wr->opcode) {
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@ -2504,36 +2462,18 @@ static int set_reg_wr(struct mlx5_ib_qp *qp,
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return 0;
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}
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static int set_frwr_li_wr(void **seg, struct ib_send_wr *wr, int *size,
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struct mlx5_core_dev *mdev, struct mlx5_ib_pd *pd, struct mlx5_ib_qp *qp)
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static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size)
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{
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int writ = 0;
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int li;
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li = wr->opcode == IB_WR_LOCAL_INV ? 1 : 0;
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if (unlikely(wr->send_flags & IB_SEND_INLINE))
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return -EINVAL;
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set_frwr_umr_segment(*seg, wr, li);
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set_linv_umr_seg(*seg);
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*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
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*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
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if (unlikely((*seg == qp->sq.qend)))
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*seg = mlx5_get_send_wqe(qp, 0);
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set_mkey_segment(*seg, wr, li, &writ);
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set_linv_mkey_seg(*seg);
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*seg += sizeof(struct mlx5_mkey_seg);
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*size += sizeof(struct mlx5_mkey_seg) / 16;
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if (unlikely((*seg == qp->sq.qend)))
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*seg = mlx5_get_send_wqe(qp, 0);
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if (!li) {
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if (unlikely(fast_reg_wr(wr)->page_list_len >
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fast_reg_wr(wr)->page_list->max_page_list_len))
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return -ENOMEM;
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set_frwr_pages(*seg, wr, mdev, pd, writ);
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*seg += sizeof(struct mlx5_wqe_data_seg);
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*size += (sizeof(struct mlx5_wqe_data_seg) / 16);
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}
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return 0;
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}
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static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16)
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@ -2649,7 +2589,6 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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{
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struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */
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struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
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struct mlx5_core_dev *mdev = dev->mdev;
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struct mlx5_ib_qp *qp = to_mqp(ibqp);
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struct mlx5_ib_mr *mr;
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struct mlx5_wqe_data_seg *dpseg;
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@ -2724,25 +2663,7 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
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qp->sq.wr_data[idx] = IB_WR_LOCAL_INV;
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ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey);
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err = set_frwr_li_wr(&seg, wr, &size, mdev, to_mpd(ibqp->pd), qp);
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if (err) {
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mlx5_ib_warn(dev, "\n");
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*bad_wr = wr;
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goto out;
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}
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num_sge = 0;
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break;
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case IB_WR_FAST_REG_MR:
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next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
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qp->sq.wr_data[idx] = IB_WR_FAST_REG_MR;
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ctrl->imm = cpu_to_be32(fast_reg_wr(wr)->rkey);
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err = set_frwr_li_wr(&seg, wr, &size, mdev, to_mpd(ibqp->pd), qp);
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if (err) {
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mlx5_ib_warn(dev, "\n");
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*bad_wr = wr;
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goto out;
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}
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set_linv_wr(qp, &seg, &size);
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num_sge = 0;
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break;
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