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ARM: dts: at91: sama5d4: switch to new clock bindings
Switch sama5d4 boards to the new PMC clock bindings. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Alexandre Belloni
parent
4ab7ca092c
commit
dcfc827d44
@ -115,7 +115,7 @@
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wm8904: codec@1a {
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compatible = "wlf,wm8904";
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reg = <0x1a>;
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clocks = <&pck2>;
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clocks = <&pmc PMC_TYPE_SYSTEM 10>;
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clock-names = "mclk";
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};
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@ -137,7 +137,7 @@
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reg = <0x00400000 0x100000
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0xfc02c000 0x4000>;
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interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
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clocks = <&udphs_clk>, <&utmi>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
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clock-names = "pclk", "hclk";
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status = "disabled";
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@ -264,7 +264,7 @@
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00500000 0x100000>;
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interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
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clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
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clock-names = "ohci_clk", "hclk", "uhpck";
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status = "disabled";
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};
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@ -273,7 +273,7 @@
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compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
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reg = <0x00600000 0x100000>;
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interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
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clocks = <&utmi>, <&uhphs_clk>;
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clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
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clock-names = "usb_clk", "ehci_clk";
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status = "disabled";
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};
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@ -297,7 +297,7 @@
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0x1 0x0 0x60000000 0x10000000
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0x2 0x0 0x70000000 0x10000000
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0x3 0x0 0x80000000 0x8000000>;
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clocks = <&mck>;
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clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
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status = "disabled";
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nand_controller: nand-controller {
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@ -327,7 +327,7 @@
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compatible = "atmel,sama5d4-hlcdc";
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reg = <0xf0000000 0x4000>;
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interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
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clock-names = "periph_clk","sys_clk", "slow_clk";
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status = "disabled";
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@ -356,7 +356,7 @@
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reg = <0xf0004000 0x200>;
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interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
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#dma-cells = <1>;
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clocks = <&dma1_clk>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
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clock-names = "dma_clk";
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};
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@ -366,7 +366,7 @@
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interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_isi_data_0_7>;
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clocks = <&isi_clk>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
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clock-names = "isi_clk";
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status = "disabled";
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port {
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@ -378,7 +378,7 @@
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ramc0: ramc@f0010000 {
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compatible = "atmel,sama5d3-ddramc";
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reg = <0xf0010000 0x200>;
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clocks = <&ddrck>, <&mpddr_clk>;
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clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
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clock-names = "ddrck", "mpddr";
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};
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@ -387,7 +387,7 @@
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reg = <0xf0014000 0x200>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
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#dma-cells = <1>;
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clocks = <&dma0_clk>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
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clock-names = "dma_clk";
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};
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@ -395,448 +395,9 @@
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compatible = "atmel,sama5d4-pmc", "syscon";
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reg = <0xf0018000 0x120>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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main_rc_osc: main_rc_osc {
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compatible = "atmel,at91sam9x5-clk-main-rc-osc";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_MOSCRCS>;
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clock-frequency = <12000000>;
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clock-accuracy = <100000000>;
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};
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main_osc: main_osc {
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compatible = "atmel,at91rm9200-clk-main-osc";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_MOSCS>;
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clocks = <&main_xtal>;
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};
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main: mainck {
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compatible = "atmel,at91sam9x5-clk-main";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_MOSCSELS>;
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clocks = <&main_rc_osc &main_osc>;
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};
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plla: pllack {
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compatible = "atmel,sama5d3-clk-pll";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_LOCKA>;
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clocks = <&main>;
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reg = <0>;
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atmel,clk-input-range = <12000000 12000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
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};
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plladiv: plladivck {
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compatible = "atmel,at91sam9x5-clk-plldiv";
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#clock-cells = <0>;
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clocks = <&plla>;
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};
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utmi: utmick {
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compatible = "atmel,at91sam9x5-clk-utmi";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_LOCKU>;
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clocks = <&main>;
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};
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mck: masterck {
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compatible = "atmel,at91sam9x5-clk-master";
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#clock-cells = <0>;
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interrupt-parent = <&pmc>;
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interrupts = <AT91_PMC_MCKRDY>;
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clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
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atmel,clk-output-range = <125000000 200000000>;
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atmel,clk-divisors = <1 2 4 3>;
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};
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h32ck: h32mxck {
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#clock-cells = <0>;
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compatible = "atmel,sama5d4-clk-h32mx";
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clocks = <&mck>;
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};
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usb: usbck {
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compatible = "atmel,at91sam9x5-clk-usb";
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#clock-cells = <0>;
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clocks = <&plladiv>, <&utmi>;
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};
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prog: progck {
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compatible = "atmel,at91sam9x5-clk-programmable";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&pmc>;
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clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
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prog0: prog0 {
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#clock-cells = <0>;
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reg = <0>;
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interrupts = <AT91_PMC_PCKRDY(0)>;
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};
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prog1: prog1 {
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#clock-cells = <0>;
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reg = <1>;
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interrupts = <AT91_PMC_PCKRDY(1)>;
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};
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prog2: prog2 {
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#clock-cells = <0>;
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reg = <2>;
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interrupts = <AT91_PMC_PCKRDY(2)>;
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};
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};
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smd: smdclk {
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compatible = "atmel,at91sam9x5-clk-smd";
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#clock-cells = <0>;
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clocks = <&plladiv>, <&utmi>;
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};
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systemck {
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compatible = "atmel,at91rm9200-clk-system";
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#address-cells = <1>;
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#size-cells = <0>;
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ddrck: ddrck {
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#clock-cells = <0>;
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reg = <2>;
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clocks = <&mck>;
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};
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lcdck: lcdck {
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#clock-cells = <0>;
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reg = <3>;
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clocks = <&mck>;
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};
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smdck: smdck {
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#clock-cells = <0>;
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reg = <4>;
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clocks = <&smd>;
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};
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uhpck: uhpck {
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#clock-cells = <0>;
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reg = <6>;
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clocks = <&usb>;
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};
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udpck: udpck {
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#clock-cells = <0>;
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reg = <7>;
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clocks = <&usb>;
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};
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pck0: pck0 {
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#clock-cells = <0>;
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reg = <8>;
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clocks = <&prog0>;
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};
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pck1: pck1 {
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#clock-cells = <0>;
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reg = <9>;
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clocks = <&prog1>;
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};
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pck2: pck2 {
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#clock-cells = <0>;
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reg = <10>;
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clocks = <&prog2>;
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};
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};
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periph32ck {
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compatible = "atmel,at91sam9x5-clk-peripheral";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&h32ck>;
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pioD_clk: pioD_clk {
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#clock-cells = <0>;
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reg = <5>;
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};
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usart0_clk: usart0_clk {
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#clock-cells = <0>;
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reg = <6>;
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};
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usart1_clk: usart1_clk {
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#clock-cells = <0>;
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reg = <7>;
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};
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icm_clk: icm_clk {
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#clock-cells = <0>;
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reg = <9>;
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};
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aes_clk: aes_clk {
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#clock-cells = <0>;
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reg = <12>;
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};
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tdes_clk: tdes_clk {
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#clock-cells = <0>;
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reg = <14>;
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};
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sha_clk: sha_clk {
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#clock-cells = <0>;
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reg = <15>;
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};
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matrix1_clk: matrix1_clk {
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#clock-cells = <0>;
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reg = <17>;
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};
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hsmc_clk: hsmc_clk {
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#clock-cells = <0>;
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reg = <22>;
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};
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pioA_clk: pioA_clk {
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#clock-cells = <0>;
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reg = <23>;
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};
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pioB_clk: pioB_clk {
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#clock-cells = <0>;
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reg = <24>;
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};
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pioC_clk: pioC_clk {
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#clock-cells = <0>;
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reg = <25>;
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};
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pioE_clk: pioE_clk {
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#clock-cells = <0>;
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reg = <26>;
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};
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uart0_clk: uart0_clk {
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#clock-cells = <0>;
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reg = <27>;
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};
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uart1_clk: uart1_clk {
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#clock-cells = <0>;
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reg = <28>;
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};
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usart2_clk: usart2_clk {
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#clock-cells = <0>;
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reg = <29>;
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};
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usart3_clk: usart3_clk {
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#clock-cells = <0>;
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reg = <30>;
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};
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usart4_clk: usart4_clk {
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#clock-cells = <0>;
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reg = <31>;
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};
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twi0_clk: twi0_clk {
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reg = <32>;
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#clock-cells = <0>;
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};
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twi1_clk: twi1_clk {
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#clock-cells = <0>;
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reg = <33>;
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};
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twi2_clk: twi2_clk {
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#clock-cells = <0>;
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reg = <34>;
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};
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mci0_clk: mci0_clk {
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#clock-cells = <0>;
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reg = <35>;
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};
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mci1_clk: mci1_clk {
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#clock-cells = <0>;
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reg = <36>;
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};
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spi0_clk: spi0_clk {
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#clock-cells = <0>;
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reg = <37>;
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};
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spi1_clk: spi1_clk {
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#clock-cells = <0>;
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reg = <38>;
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};
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spi2_clk: spi2_clk {
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#clock-cells = <0>;
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reg = <39>;
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};
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tcb0_clk: tcb0_clk {
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#clock-cells = <0>;
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reg = <40>;
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};
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tcb1_clk: tcb1_clk {
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#clock-cells = <0>;
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reg = <41>;
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};
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tcb2_clk: tcb2_clk {
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#clock-cells = <0>;
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reg = <42>;
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};
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pwm_clk: pwm_clk {
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#clock-cells = <0>;
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reg = <43>;
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};
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adc_clk: adc_clk {
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#clock-cells = <0>;
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reg = <44>;
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};
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dbgu_clk: dbgu_clk {
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#clock-cells = <0>;
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reg = <45>;
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};
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uhphs_clk: uhphs_clk {
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#clock-cells = <0>;
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reg = <46>;
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};
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udphs_clk: udphs_clk {
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#clock-cells = <0>;
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reg = <47>;
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};
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ssc0_clk: ssc0_clk {
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#clock-cells = <0>;
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reg = <48>;
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};
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ssc1_clk: ssc1_clk {
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#clock-cells = <0>;
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reg = <49>;
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};
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trng_clk: trng_clk {
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#clock-cells = <0>;
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reg = <53>;
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};
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macb0_clk: macb0_clk {
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#clock-cells = <0>;
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reg = <54>;
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};
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macb1_clk: macb1_clk {
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#clock-cells = <0>;
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reg = <55>;
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};
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fuse_clk: fuse_clk {
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#clock-cells = <0>;
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reg = <57>;
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};
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securam_clk: securam_clk {
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#clock-cells = <0>;
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reg = <59>;
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};
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smd_clk: smd_clk {
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#clock-cells = <0>;
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reg = <61>;
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};
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twi3_clk: twi3_clk {
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#clock-cells = <0>;
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reg = <62>;
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};
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catb_clk: catb_clk {
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#clock-cells = <0>;
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reg = <63>;
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};
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};
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periph64ck {
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compatible = "atmel,at91sam9x5-clk-peripheral";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mck>;
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dma0_clk: dma0_clk {
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#clock-cells = <0>;
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reg = <8>;
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};
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cpkcc_clk: cpkcc_clk {
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#clock-cells = <0>;
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reg = <10>;
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};
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aesb_clk: aesb_clk {
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#clock-cells = <0>;
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reg = <13>;
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};
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mpddr_clk: mpddr_clk {
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#clock-cells = <0>;
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reg = <16>;
|
||||
};
|
||||
|
||||
matrix0_clk: matrix0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
vdec_clk: vdec_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
dma1_clk: dma1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <50>;
|
||||
};
|
||||
|
||||
lcdc_clk: lcdc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <51>;
|
||||
};
|
||||
|
||||
isi_clk: isi_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <52>;
|
||||
};
|
||||
};
|
||||
#clock-cells = <2>;
|
||||
clocks = <&clk32k>, <&main_xtal>;
|
||||
clock-names = "slow_clk", "main_xtal";
|
||||
};
|
||||
|
||||
mmc0: mmc@f8000000 {
|
||||
@ -852,7 +413,7 @@
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&mci0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
|
||||
clock-names = "mci_clk";
|
||||
};
|
||||
|
||||
@ -869,7 +430,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
clocks = <&uart0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -887,7 +448,7 @@
|
||||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
|
||||
| AT91_XDMAC_DT_PERID(27))>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&ssc0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
|
||||
clock-names = "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -897,7 +458,7 @@
|
||||
reg = <0xf800c000 0x300>;
|
||||
interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
|
||||
#pwm-cells = <3>;
|
||||
clocks = <&pwm_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -916,7 +477,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&spi0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -936,7 +497,7 @@
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&twi0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -955,7 +516,7 @@
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&twi1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -965,7 +526,7 @@
|
||||
#size-cells = <0>;
|
||||
reg = <0xf801c000 0x100>;
|
||||
interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tcb0_clk>, <&clk32k>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
|
||||
clock-names = "t0_clk", "slow_clk";
|
||||
};
|
||||
|
||||
@ -977,7 +538,7 @@
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&macb0_clk>, <&macb0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -997,7 +558,7 @@
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&twi2_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1019,7 +580,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
|
||||
clocks = <&usart0_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1037,7 +598,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
|
||||
clocks = <&usart1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1055,7 +616,7 @@
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&mci1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
|
||||
clock-names = "mci_clk";
|
||||
};
|
||||
|
||||
@ -1072,7 +633,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
clocks = <&uart1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1090,7 +651,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
|
||||
clocks = <&usart2_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1108,7 +669,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
clocks = <&usart3_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1126,7 +687,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart4>;
|
||||
clocks = <&usart4_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1144,7 +705,7 @@
|
||||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
|
||||
| AT91_XDMAC_DT_PERID(29))>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&ssc1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
|
||||
clock-names = "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1164,7 +725,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
clocks = <&spi1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1184,7 +745,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi2>;
|
||||
clocks = <&spi2_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1195,7 +756,7 @@
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc020000 0x100>;
|
||||
interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tcb1_clk>, <&clk32k>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
|
||||
clock-names = "t0_clk", "slow_clk";
|
||||
};
|
||||
|
||||
@ -1205,7 +766,7 @@
|
||||
#size-cells = <0>;
|
||||
reg = <0xfc024000 0x100>;
|
||||
interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tcb2_clk>, <&clk32k>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
|
||||
clock-names = "t0_clk", "slow_clk";
|
||||
};
|
||||
|
||||
@ -1217,7 +778,7 @@
|
||||
pinctrl-0 = <&pinctrl_macb1_rmii>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&macb1_clk>, <&macb1_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1226,14 +787,14 @@
|
||||
compatible = "atmel,at91sam9g45-trng";
|
||||
reg = <0xfc030000 0x100>;
|
||||
interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&trng_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
|
||||
};
|
||||
|
||||
adc0: adc@fc034000 {
|
||||
compatible = "atmel,at91sam9x5-adc";
|
||||
reg = <0xfc034000 0x100>;
|
||||
interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
clocks = <&adc_clk>,
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
|
||||
<&adc_op_clk>;
|
||||
clock-names = "adc_clk", "adc_op_clk";
|
||||
atmel,adc-channels-used = <0x01f>;
|
||||
@ -1276,7 +837,7 @@
|
||||
<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
|
||||
| AT91_XDMAC_DT_PERID(40))>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&aes_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
|
||||
clock-names = "aes_clk";
|
||||
status = "okay";
|
||||
};
|
||||
@ -1290,7 +851,7 @@
|
||||
<&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
|
||||
| AT91_XDMAC_DT_PERID(43))>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&tdes_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
|
||||
clock-names = "tdes_clk";
|
||||
status = "okay";
|
||||
};
|
||||
@ -1302,7 +863,7 @@
|
||||
dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
|
||||
| AT91_XDMAC_DT_PERID(44))>;
|
||||
dma-names = "tx";
|
||||
clocks = <&sha_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
|
||||
clock-names = "sha_clk";
|
||||
status = "okay";
|
||||
};
|
||||
@ -1311,7 +872,7 @@
|
||||
compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
|
||||
reg = <0xfc05c000 0x1000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
clocks = <&hsmc_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
@ -1339,7 +900,7 @@
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfc068630 0x10>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
clocks = <&h32ck>;
|
||||
clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
|
||||
};
|
||||
|
||||
watchdog: watchdog@fc068640 {
|
||||
@ -1370,7 +931,7 @@
|
||||
interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&dbgu_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1400,7 +961,7 @@
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioA_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
|
||||
};
|
||||
|
||||
pioB: gpio@fc06b000 {
|
||||
@ -1411,7 +972,7 @@
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioB_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
|
||||
};
|
||||
|
||||
pioC: gpio@fc06c000 {
|
||||
@ -1422,7 +983,7 @@
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioC_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
|
||||
};
|
||||
|
||||
pioD: gpio@fc068000 {
|
||||
@ -1433,7 +994,7 @@
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioD_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
|
||||
};
|
||||
|
||||
pioE: gpio@fc06d000 {
|
||||
@ -1444,7 +1005,7 @@
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioE_clk>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
|
||||
};
|
||||
|
||||
/* pinctrl pin settings */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user