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ARM: S5P6442: Bug fix on PWM Timer
This patch fixes return value in below functions - pwm_cfg_src_is_tclk - tcfg_to_divisor - pwm_tdiv_has_div1 - pwm_tdiv_div_bits And this patch changes Copyright ordering. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -1,13 +1,14 @@
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/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* Copyright 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
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* Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
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*
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* S5P6442 - pwm clock and timer support
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*
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@ -21,14 +22,14 @@
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/**
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* pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
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* @cfg: The timer TCFG1 register bits shifted down to 0.
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* @tcfg: The timer TCFG1 register bits shifted down to 0.
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*
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* Return true if the given configuration from TCFG1 is a TCLK instead
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* any of the TDIV clocks.
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*/
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static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
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{
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return tcfg == S3C2410_TCFG1_MUX_TCLK;
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return tcfg == S3C64XX_TCFG1_MUX_TCLK;
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}
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/**
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@ -40,7 +41,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
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*/
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static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
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{
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return 1 << (1 + tcfg1);
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return 1 << tcfg1;
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}
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/**
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@ -50,7 +51,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
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*/
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static inline unsigned int pwm_tdiv_has_div1(void)
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{
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return 0;
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return 1;
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}
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/**
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@ -61,9 +62,9 @@ static inline unsigned int pwm_tdiv_has_div1(void)
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*/
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static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
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{
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return ilog2(div) - 1;
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return ilog2(div);
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}
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#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
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#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
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#endif /* __ASM_ARCH_PWMCLK_H */
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