mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-25 21:24:08 +08:00
gpio/pinctrl updates for v6.7-rc1
- rework the GPIO-to-pinctrl glue code to stop using the deprecated global GPIO numberspace - remove now unused wrappers around pinctrl GPIO helpers from drivers - remove gpiochip_find() as it has no more users -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmVIp/0ACgkQEacuoBRx 13I1CA//dC/4whtHH+0J2rTk+f+o/zYG19N4UxOjTbKFBy2gN5Xh5NCjtoFI2dU6 TI0Cggl6IOaIqenHgy7vhL7n4iaWdvGlQpTVS5a336R8iu6fyinGAcV6Om4Dd/oD 7GqCLTVYa28KMOMmHgBdSbLpM1VTjBuXmcRwBN33JlIgkAw9yre7dVqKm+uOO3LN 9ok72NKZ2i/AUqjGV+3LAZf4Vlnj5CasFgQYuHaOXwPxZhAxG2WnxclFs1CRTTt/ 64E9VWlkFfmXkJshCpAyoR3hsVFq+hhxK8YacqAfKpA4o7G2zHB30kqDm79wkmba Hp6j4NOw7qdRvGmZhVrRuuABXkgI8R0B4UfT9+0bX17OskwoEKfRdCwZM2CmqATe f+4iysHE0Y6jAweGcpE09r01fVqEWVBqWGx8Rdqcwl/Lwz0xZZwaNtdPWXQMAqhj h/y39LjrI1cNuoQ8/v+tc0xw0zrJXC/oxlJhkwctv2rarFs0hdEgQkh5ZroUKjRG BLIW3XSc98S0Bj9xQ88mLwvSApaNi162PESfeTMpW3RpeexECtH4SgZ/pIR+Lmbs 9eWksGTgpIqdRMgqRrltDzRYkAhm0vQre/spBooHo5paV3J7BNjaf7gjCoPuhwOO 0e1Y94UnPvcD6Y3Dcv4PQ3M5YF6QEGX0X3UbmJ4//7aOY9G6VOk= =0p0S -----END PGP SIGNATURE----- Merge tag 'gpio-pinctrl-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio/pinctrl updates from Bartosz Golaszewski: "The bulk of it is a rework of the glue layer between pinctrl and GPIO. We changed the signature of GPIO helpers for pinctrl to taking the gpio_chip/offset pair as arguments instead of using the deprecated global GPIO numberspace. The last little bit is removing the gpiochip_find() function as it now has no more users in-tree. Summary: - rework the GPIO-to-pinctrl glue code to stop using the deprecated global GPIO numberspace - remove now unused wrappers around pinctrl GPIO helpers from drivers - remove gpiochip_find() as it has no more users" * tag 'gpio-pinctrl-updates-for-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (70 commits) pinctrl: tegra: drop the wrapper around pinctrl_gpio_request() pinctrl: em: drop the wrapper around pinctrl_gpio_request() pinctrl: nuvoton: npcm8xx: drop wrappers around pinctrl_gpio_request/free() pinctrl: nuvoton: npcm7xx: drop wrappers around pinctrl_gpio_request/free() pinctrl: stm32: drop wrappers around pinctrl_gpio_free/input() pinctrl: starfive: jh7110: drop wrappers around pinctrl_gpio_request/free() pinctrl: starfive: jh7100: drop wrappers around pinctrl_gpio_request/free() pinctrl: ocelot: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: cirrus: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: mediatek: common: drop the wrappers around pinctrl_gpio_direction_input() pinctrl: mediatek: moore: drop the wrappers around pinctrl_gpio_direction_input() pinctrl: rk805: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: axp209: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: vt8500: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: as3722: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: ingenic: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: st: drop the wrapper around pinctrl_gpio_direction_input() pinctrl: change the signature of pinctrl_ready_for_gpio_range() pinctrl: change the signature of gpio_to_pin() pinctrl: change the signature of pinctrl_match_gpio_range() ...
This commit is contained in:
commit
dc1434801d
@ -750,12 +750,12 @@ static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
if (!have_gpio(gpiochip_get_data(chip), offset))
|
||||
return -ENODEV;
|
||||
|
||||
return pinctrl_gpio_request(chip->base + offset);
|
||||
return pinctrl_gpio_request(chip, offset);
|
||||
}
|
||||
|
||||
static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
}
|
||||
|
||||
static int usecs_to_cycles(struct aspeed_gpio *gpio, unsigned long usecs,
|
||||
@ -973,7 +973,7 @@ static int aspeed_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
|
||||
else if (param == PIN_CONFIG_BIAS_DISABLE ||
|
||||
param == PIN_CONFIG_BIAS_PULL_DOWN ||
|
||||
param == PIN_CONFIG_DRIVE_STRENGTH)
|
||||
return pinctrl_gpio_set_config(chip->base + offset, config);
|
||||
return pinctrl_gpio_set_config(chip, offset, config);
|
||||
else if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN ||
|
||||
param == PIN_CONFIG_DRIVE_OPEN_SOURCE)
|
||||
/* Return -ENOTSUPP to trigger emulation, as per datasheet */
|
||||
|
@ -227,14 +227,9 @@ static int em_gio_to_irq(struct gpio_chip *chip, unsigned offset)
|
||||
return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
|
||||
}
|
||||
|
||||
static int em_gio_request(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_request(chip->base + offset);
|
||||
}
|
||||
|
||||
static void em_gio_free(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
|
||||
/* Set the GPIO as an input to ensure that the next GPIO request won't
|
||||
* drive the GPIO pin as an output.
|
||||
@ -311,7 +306,7 @@ static int em_gio_probe(struct platform_device *pdev)
|
||||
gpio_chip->direction_output = em_gio_direction_output;
|
||||
gpio_chip->set = em_gio_set;
|
||||
gpio_chip->to_irq = em_gio_to_irq;
|
||||
gpio_chip->request = em_gio_request;
|
||||
gpio_chip->request = pinctrl_gpio_request;
|
||||
gpio_chip->free = em_gio_free;
|
||||
gpio_chip->label = name;
|
||||
gpio_chip->parent = dev;
|
||||
|
@ -346,7 +346,7 @@ static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
|
||||
* Check with the pinctrl driver whether this pin is usable as
|
||||
* an input GPIO
|
||||
*/
|
||||
ret = pinctrl_gpio_direction_input(chip->base + pin);
|
||||
ret = pinctrl_gpio_direction_input(chip, pin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -366,7 +366,7 @@ static int mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned int pin,
|
||||
* Check with the pinctrl driver whether this pin is usable as
|
||||
* an output GPIO
|
||||
*/
|
||||
ret = pinctrl_gpio_direction_output(chip->base + pin);
|
||||
ret = pinctrl_gpio_direction_output(chip, pin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -260,7 +260,7 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
int ret;
|
||||
|
||||
if (pxa_gpio_has_pinctrl()) {
|
||||
ret = pinctrl_gpio_direction_input(chip->base + offset);
|
||||
ret = pinctrl_gpio_direction_input(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
@ -289,7 +289,7 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
|
||||
writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
|
||||
|
||||
if (pxa_gpio_has_pinctrl()) {
|
||||
ret = pinctrl_gpio_direction_output(chip->base + offset);
|
||||
ret = pinctrl_gpio_direction_output(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
@ -275,7 +275,7 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
|
||||
return error;
|
||||
}
|
||||
|
||||
error = pinctrl_gpio_request(chip->base + offset);
|
||||
error = pinctrl_gpio_request(chip, offset);
|
||||
if (error)
|
||||
pm_runtime_put(p->dev);
|
||||
|
||||
@ -286,7 +286,7 @@ static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct gpio_rcar_priv *p = gpiochip_get_data(chip);
|
||||
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
|
||||
/*
|
||||
* Set the GPIO as an input to ensure that the next GPIO request won't
|
||||
|
@ -159,9 +159,9 @@ static int rockchip_gpio_set_direction(struct gpio_chip *chip,
|
||||
|
||||
|
||||
if (input)
|
||||
pinctrl_gpio_direction_input(bank->pin_base + offset);
|
||||
pinctrl_gpio_direction_input(chip, offset);
|
||||
else
|
||||
pinctrl_gpio_direction_output(bank->pin_base + offset);
|
||||
pinctrl_gpio_direction_output(chip, offset);
|
||||
|
||||
raw_spin_lock_irqsave(&bank->slock, flags);
|
||||
rockchip_gpio_writel_bit(bank, offset, data, bank->gpio_regs->port_ddr);
|
||||
|
@ -137,16 +137,11 @@ static void tegra_gpio_disable(struct tegra_gpio_info *tgi, unsigned int gpio)
|
||||
tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 0);
|
||||
}
|
||||
|
||||
static int tegra_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_request(chip->base + offset);
|
||||
}
|
||||
|
||||
static void tegra_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct tegra_gpio_info *tgi = gpiochip_get_data(chip);
|
||||
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
tegra_gpio_disable(tgi, offset);
|
||||
}
|
||||
|
||||
@ -179,7 +174,7 @@ static int tegra_gpio_direction_input(struct gpio_chip *chip,
|
||||
tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 0);
|
||||
tegra_gpio_enable(tgi, offset);
|
||||
|
||||
ret = pinctrl_gpio_direction_input(chip->base + offset);
|
||||
ret = pinctrl_gpio_direction_input(chip, offset);
|
||||
if (ret < 0)
|
||||
dev_err(tgi->dev,
|
||||
"Failed to set pinctrl input direction of GPIO %d: %d",
|
||||
@ -199,7 +194,7 @@ static int tegra_gpio_direction_output(struct gpio_chip *chip,
|
||||
tegra_gpio_mask_write(tgi, GPIO_MSK_OE(tgi, offset), offset, 1);
|
||||
tegra_gpio_enable(tgi, offset);
|
||||
|
||||
ret = pinctrl_gpio_direction_output(chip->base + offset);
|
||||
ret = pinctrl_gpio_direction_output(chip, offset);
|
||||
if (ret < 0)
|
||||
dev_err(tgi->dev,
|
||||
"Failed to set pinctrl output direction of GPIO %d: %d",
|
||||
@ -717,7 +712,7 @@ static int tegra_gpio_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
tgi->gc.label = "tegra-gpio";
|
||||
tgi->gc.request = tegra_gpio_request;
|
||||
tgi->gc.request = pinctrl_gpio_request;
|
||||
tgi->gc.free = tegra_gpio_free;
|
||||
tgi->gc.direction_input = tegra_gpio_direction_input;
|
||||
tgi->gc.get = tegra_gpio_get;
|
||||
|
@ -130,7 +130,7 @@ static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
|
||||
}
|
||||
|
||||
return pinctrl_gpio_direction_input(chip->base + gpio);
|
||||
return pinctrl_gpio_direction_input(chip, gpio);
|
||||
}
|
||||
|
||||
static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
|
||||
@ -148,7 +148,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
|
||||
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
|
||||
}
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + gpio);
|
||||
return pinctrl_gpio_direction_output(chip, gpio);
|
||||
}
|
||||
|
||||
static void vf610_gpio_irq_handler(struct irq_desc *desc)
|
||||
|
@ -2287,8 +2287,7 @@ static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
|
||||
* FIXME: find a non-racy way to retrieve this information. Maybe a
|
||||
* lock common to both frameworks?
|
||||
*/
|
||||
ok_for_pinctrl =
|
||||
pinctrl_gpio_can_use_line(gc->base + info->offset);
|
||||
ok_for_pinctrl = pinctrl_gpio_can_use_line(gc, info->offset);
|
||||
|
||||
spin_lock_irqsave(&gpio_lock, flags);
|
||||
|
||||
|
@ -1092,28 +1092,6 @@ void gpiochip_remove(struct gpio_chip *gc)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_remove);
|
||||
|
||||
/*
|
||||
* FIXME: This will be removed soon.
|
||||
*
|
||||
* This function is depracated, don't use.
|
||||
*/
|
||||
struct gpio_chip *gpiochip_find(void *data,
|
||||
int (*match)(struct gpio_chip *gc,
|
||||
void *data))
|
||||
{
|
||||
struct gpio_device *gdev;
|
||||
struct gpio_chip *gc = NULL;
|
||||
|
||||
gdev = gpio_device_find(data, match);
|
||||
if (gdev) {
|
||||
gc = gdev->chip;
|
||||
gpio_device_put(gdev);
|
||||
}
|
||||
|
||||
return gc;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_find);
|
||||
|
||||
/**
|
||||
* gpio_device_find() - find a specific GPIO device
|
||||
* @data: data to pass to match function
|
||||
@ -2036,7 +2014,7 @@ int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
return pinctrl_gpio_request(gc->gpiodev->base + offset);
|
||||
return pinctrl_gpio_request(gc, offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_generic_request);
|
||||
|
||||
@ -2052,7 +2030,7 @@ void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
|
||||
return;
|
||||
#endif
|
||||
|
||||
pinctrl_gpio_free(gc->gpiodev->base + offset);
|
||||
pinctrl_gpio_free(gc, offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_generic_free);
|
||||
|
||||
@ -2065,7 +2043,7 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_free);
|
||||
int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
|
||||
unsigned long config)
|
||||
{
|
||||
return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
|
||||
return pinctrl_gpio_set_config(gc, offset, config);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(gpiochip_generic_config);
|
||||
|
||||
|
@ -330,24 +330,22 @@ static const struct irq_chip iproc_gpio_irq_chip = {
|
||||
static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct iproc_gpio *chip = gpiochip_get_data(gc);
|
||||
unsigned gpio = gc->base + offset;
|
||||
|
||||
/* not all Iproc GPIO pins can be muxed individually */
|
||||
if (!chip->pinmux_is_supported)
|
||||
return 0;
|
||||
|
||||
return pinctrl_gpio_request(gpio);
|
||||
return pinctrl_gpio_request(gc, offset);
|
||||
}
|
||||
|
||||
static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct iproc_gpio *chip = gpiochip_get_data(gc);
|
||||
unsigned gpio = gc->base + offset;
|
||||
|
||||
if (!chip->pinmux_is_supported)
|
||||
return;
|
||||
|
||||
pinctrl_gpio_free(gpio);
|
||||
pinctrl_gpio_free(gc, offset);
|
||||
}
|
||||
|
||||
static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
|
||||
|
@ -506,17 +506,12 @@ static void cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, int va
|
||||
pm_runtime_put(priv->dev);
|
||||
}
|
||||
|
||||
static int cs42l43_gpio_direction_in(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int cs42l43_gpio_direction_out(struct gpio_chip *chip,
|
||||
unsigned int offset, int value)
|
||||
{
|
||||
cs42l43_gpio_set(chip, offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int cs42l43_gpio_add_pin_ranges(struct gpio_chip *chip)
|
||||
@ -551,7 +546,7 @@ static int cs42l43_pin_probe(struct platform_device *pdev)
|
||||
|
||||
priv->gpio_chip.request = gpiochip_generic_request;
|
||||
priv->gpio_chip.free = gpiochip_generic_free;
|
||||
priv->gpio_chip.direction_input = cs42l43_gpio_direction_in;
|
||||
priv->gpio_chip.direction_input = pinctrl_gpio_direction_input;
|
||||
priv->gpio_chip.direction_output = cs42l43_gpio_direction_out;
|
||||
priv->gpio_chip.add_pin_ranges = cs42l43_gpio_add_pin_ranges;
|
||||
priv->gpio_chip.get = cs42l43_gpio_get;
|
||||
|
@ -1098,7 +1098,7 @@ static int lochnagar_gpio_direction_out(struct gpio_chip *chip,
|
||||
{
|
||||
lochnagar_gpio_set(chip, offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int lochnagar_fill_func_groups(struct lochnagar_pin_priv *priv)
|
||||
|
@ -23,6 +23,8 @@
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/gpio/driver.h>
|
||||
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/pinctrl/devinfo.h>
|
||||
#include <linux/pinctrl/machine.h>
|
||||
@ -267,7 +269,8 @@ static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
|
||||
/**
|
||||
* gpio_to_pin() - GPIO range GPIO number to pin number translation
|
||||
* @range: GPIO range used for the translation
|
||||
* @gpio: gpio pin to translate to a pin number
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* Finds the pin number for a given GPIO using the specified GPIO range
|
||||
* as a base for translation. The distinction between linear GPIO ranges
|
||||
@ -278,25 +281,27 @@ static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
|
||||
* result of successful pinctrl_get_device_gpio_range calls)!
|
||||
*/
|
||||
static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
|
||||
unsigned int gpio)
|
||||
struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
unsigned int offset = gpio - range->base;
|
||||
unsigned int pin = gc->base + offset - range->base;
|
||||
if (range->pins)
|
||||
return range->pins[offset];
|
||||
return range->pins[pin];
|
||||
else
|
||||
return range->pin_base + offset;
|
||||
return range->pin_base + pin;
|
||||
}
|
||||
|
||||
/**
|
||||
* pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
|
||||
* @pctldev: pin controller device to check
|
||||
* @gpio: gpio pin to check taken from the global GPIO pin space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* Tries to match a GPIO pin number to the ranges handled by a certain pin
|
||||
* controller, return the range or NULL
|
||||
*/
|
||||
static struct pinctrl_gpio_range *
|
||||
pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
|
||||
pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, struct gpio_chip *gc,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct pinctrl_gpio_range *range;
|
||||
|
||||
@ -304,8 +309,8 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
|
||||
/* Loop over the ranges */
|
||||
list_for_each_entry(range, &pctldev->gpio_ranges, node) {
|
||||
/* Check if we're in the valid range */
|
||||
if (gpio >= range->base &&
|
||||
gpio < range->base + range->npins) {
|
||||
if ((gc->base + offset) >= range->base &&
|
||||
(gc->base + offset) < range->base + range->npins) {
|
||||
mutex_unlock(&pctldev->mutex);
|
||||
return range;
|
||||
}
|
||||
@ -317,7 +322,8 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
|
||||
/**
|
||||
* pinctrl_ready_for_gpio_range() - check if other GPIO pins of
|
||||
* the same GPIO chip are in range
|
||||
* @gpio: gpio pin to check taken from the global GPIO pin space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* This function is complement of pinctrl_match_gpio_range(). If the return
|
||||
* value of pinctrl_match_gpio_range() is NULL, this function could be used
|
||||
@ -328,19 +334,11 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
|
||||
* is false, it means that pinctrl device may not be ready.
|
||||
*/
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
static bool pinctrl_ready_for_gpio_range(unsigned gpio)
|
||||
static bool pinctrl_ready_for_gpio_range(struct gpio_chip *gc,
|
||||
unsigned int offset)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
struct pinctrl_gpio_range *range = NULL;
|
||||
/*
|
||||
* FIXME: "gpio" here is a number in the global GPIO numberspace.
|
||||
* get rid of this from the ranges eventually and get the GPIO
|
||||
* descriptor from the gpio_chip.
|
||||
*/
|
||||
struct gpio_chip *chip = gpiod_to_chip(gpio_to_desc(gpio));
|
||||
|
||||
if (WARN(!chip, "no gpio_chip for gpio%i?", gpio))
|
||||
return false;
|
||||
|
||||
mutex_lock(&pinctrldev_list_mutex);
|
||||
|
||||
@ -350,8 +348,8 @@ static bool pinctrl_ready_for_gpio_range(unsigned gpio)
|
||||
mutex_lock(&pctldev->mutex);
|
||||
list_for_each_entry(range, &pctldev->gpio_ranges, node) {
|
||||
/* Check if any gpio range overlapped with gpio chip */
|
||||
if (range->base + range->npins - 1 < chip->base ||
|
||||
range->base > chip->base + chip->ngpio - 1)
|
||||
if (range->base + range->npins - 1 < gc->base ||
|
||||
range->base > gc->base + gc->ngpio - 1)
|
||||
continue;
|
||||
mutex_unlock(&pctldev->mutex);
|
||||
mutex_unlock(&pinctrldev_list_mutex);
|
||||
@ -365,12 +363,17 @@ static bool pinctrl_ready_for_gpio_range(unsigned gpio)
|
||||
return false;
|
||||
}
|
||||
#else
|
||||
static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; }
|
||||
static inline bool
|
||||
pinctrl_ready_for_gpio_range(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* pinctrl_get_device_gpio_range() - find device for GPIO range
|
||||
* @gpio: the pin to locate the pin controller for
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
* @outdev: the pin control device if found
|
||||
* @outrange: the GPIO range if found
|
||||
*
|
||||
@ -379,7 +382,8 @@ static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; }
|
||||
* -EPROBE_DEFER if the GPIO range could not be found in any device since it
|
||||
* may still have not been registered.
|
||||
*/
|
||||
static int pinctrl_get_device_gpio_range(unsigned gpio,
|
||||
static int pinctrl_get_device_gpio_range(struct gpio_chip *gc,
|
||||
unsigned int offset,
|
||||
struct pinctrl_dev **outdev,
|
||||
struct pinctrl_gpio_range **outrange)
|
||||
{
|
||||
@ -391,7 +395,7 @@ static int pinctrl_get_device_gpio_range(unsigned gpio,
|
||||
list_for_each_entry(pctldev, &pinctrldev_list, node) {
|
||||
struct pinctrl_gpio_range *range;
|
||||
|
||||
range = pinctrl_match_gpio_range(pctldev, gpio);
|
||||
range = pinctrl_match_gpio_range(pctldev, gc, offset);
|
||||
if (range) {
|
||||
*outdev = pctldev;
|
||||
*outrange = range;
|
||||
@ -753,7 +757,7 @@ int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
bool pinctrl_gpio_can_use_line(unsigned gpio)
|
||||
bool pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
struct pinctrl_gpio_range *range;
|
||||
@ -765,13 +769,13 @@ bool pinctrl_gpio_can_use_line(unsigned gpio)
|
||||
* we're probably dealing with GPIO driver
|
||||
* without a backing pin controller - bail out.
|
||||
*/
|
||||
if (pinctrl_get_device_gpio_range(gpio, &pctldev, &range))
|
||||
if (pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range))
|
||||
return true;
|
||||
|
||||
mutex_lock(&pctldev->mutex);
|
||||
|
||||
/* Convert to the pin controllers number space */
|
||||
pin = gpio_to_pin(range, gpio);
|
||||
pin = gpio_to_pin(range, gc, offset);
|
||||
|
||||
result = pinmux_can_be_used_for_gpio(pctldev, pin);
|
||||
|
||||
@ -783,22 +787,22 @@ EXPORT_SYMBOL_GPL(pinctrl_gpio_can_use_line);
|
||||
|
||||
/**
|
||||
* pinctrl_gpio_request() - request a single pin to be used as GPIO
|
||||
* @gpio: the GPIO pin number from the GPIO subsystem number space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* This function should *ONLY* be used from gpiolib-based GPIO drivers,
|
||||
* as part of their gpio_request() semantics, platforms and individual drivers
|
||||
* shall *NOT* request GPIO pins to be muxed in.
|
||||
*/
|
||||
int pinctrl_gpio_request(unsigned gpio)
|
||||
int pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
struct pinctrl_gpio_range *range;
|
||||
int ret;
|
||||
int pin;
|
||||
struct pinctrl_dev *pctldev;
|
||||
int ret, pin;
|
||||
|
||||
ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
|
||||
ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
|
||||
if (ret) {
|
||||
if (pinctrl_ready_for_gpio_range(gpio))
|
||||
if (pinctrl_ready_for_gpio_range(gc, offset))
|
||||
ret = 0;
|
||||
return ret;
|
||||
}
|
||||
@ -806,9 +810,9 @@ int pinctrl_gpio_request(unsigned gpio)
|
||||
mutex_lock(&pctldev->mutex);
|
||||
|
||||
/* Convert to the pin controllers number space */
|
||||
pin = gpio_to_pin(range, gpio);
|
||||
pin = gpio_to_pin(range, gc, offset);
|
||||
|
||||
ret = pinmux_request_gpio(pctldev, range, pin, gpio);
|
||||
ret = pinmux_request_gpio(pctldev, range, pin, gc->base + offset);
|
||||
|
||||
mutex_unlock(&pctldev->mutex);
|
||||
|
||||
@ -818,27 +822,27 @@ EXPORT_SYMBOL_GPL(pinctrl_gpio_request);
|
||||
|
||||
/**
|
||||
* pinctrl_gpio_free() - free control on a single pin, currently used as GPIO
|
||||
* @gpio: the GPIO pin number from the GPIO subsystem number space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* This function should *ONLY* be used from gpiolib-based GPIO drivers,
|
||||
* as part of their gpio_free() semantics, platforms and individual drivers
|
||||
* shall *NOT* request GPIO pins to be muxed out.
|
||||
* as part of their gpio_request() semantics, platforms and individual drivers
|
||||
* shall *NOT* request GPIO pins to be muxed in.
|
||||
*/
|
||||
void pinctrl_gpio_free(unsigned gpio)
|
||||
void pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
struct pinctrl_gpio_range *range;
|
||||
int ret;
|
||||
int pin;
|
||||
struct pinctrl_dev *pctldev;
|
||||
int ret, pin;
|
||||
|
||||
ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
|
||||
if (ret) {
|
||||
ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
|
||||
if (ret)
|
||||
return;
|
||||
}
|
||||
|
||||
mutex_lock(&pctldev->mutex);
|
||||
|
||||
/* Convert to the pin controllers number space */
|
||||
pin = gpio_to_pin(range, gpio);
|
||||
pin = gpio_to_pin(range, gc, offset);
|
||||
|
||||
pinmux_free_gpio(pctldev, pin, range);
|
||||
|
||||
@ -846,14 +850,15 @@ void pinctrl_gpio_free(unsigned gpio)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_gpio_free);
|
||||
|
||||
static int pinctrl_gpio_direction(unsigned gpio, bool input)
|
||||
static int pinctrl_gpio_direction(struct gpio_chip *gc, unsigned int offset,
|
||||
bool input)
|
||||
{
|
||||
struct pinctrl_dev *pctldev;
|
||||
struct pinctrl_gpio_range *range;
|
||||
int ret;
|
||||
int pin;
|
||||
|
||||
ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
|
||||
ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
|
||||
if (ret) {
|
||||
return ret;
|
||||
}
|
||||
@ -861,7 +866,7 @@ static int pinctrl_gpio_direction(unsigned gpio, bool input)
|
||||
mutex_lock(&pctldev->mutex);
|
||||
|
||||
/* Convert to the pin controllers number space */
|
||||
pin = gpio_to_pin(range, gpio);
|
||||
pin = gpio_to_pin(range, gc, offset);
|
||||
ret = pinmux_gpio_direction(pctldev, range, pin, input);
|
||||
|
||||
mutex_unlock(&pctldev->mutex);
|
||||
@ -871,54 +876,58 @@ static int pinctrl_gpio_direction(unsigned gpio, bool input)
|
||||
|
||||
/**
|
||||
* pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
|
||||
* @gpio: the GPIO pin number from the GPIO subsystem number space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* This function should *ONLY* be used from gpiolib-based GPIO drivers,
|
||||
* as part of their gpio_direction_input() semantics, platforms and individual
|
||||
* drivers shall *NOT* touch pin control GPIO calls.
|
||||
*/
|
||||
int pinctrl_gpio_direction_input(unsigned gpio)
|
||||
int pinctrl_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction(gpio, true);
|
||||
return pinctrl_gpio_direction(gc, offset, true);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
|
||||
|
||||
/**
|
||||
* pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
|
||||
* @gpio: the GPIO pin number from the GPIO subsystem number space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
*
|
||||
* This function should *ONLY* be used from gpiolib-based GPIO drivers,
|
||||
* as part of their gpio_direction_output() semantics, platforms and individual
|
||||
* drivers shall *NOT* touch pin control GPIO calls.
|
||||
*/
|
||||
int pinctrl_gpio_direction_output(unsigned gpio)
|
||||
int pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction(gpio, false);
|
||||
return pinctrl_gpio_direction(gc, offset, false);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
|
||||
|
||||
/**
|
||||
* pinctrl_gpio_set_config() - Apply config to given GPIO pin
|
||||
* @gpio: the GPIO pin number from the GPIO subsystem number space
|
||||
* @gc: GPIO chip structure from the GPIO subsystem
|
||||
* @offset: hardware offset of the GPIO relative to the controller
|
||||
* @config: the configuration to apply to the GPIO
|
||||
*
|
||||
* This function should *ONLY* be used from gpiolib-based GPIO drivers, if
|
||||
* they need to call the underlying pin controller to change GPIO config
|
||||
* (for example set debounce time).
|
||||
*/
|
||||
int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
|
||||
int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
|
||||
unsigned long config)
|
||||
{
|
||||
unsigned long configs[] = { config };
|
||||
struct pinctrl_gpio_range *range;
|
||||
struct pinctrl_dev *pctldev;
|
||||
int ret, pin;
|
||||
|
||||
ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
|
||||
ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mutex_lock(&pctldev->mutex);
|
||||
pin = gpio_to_pin(range, gpio);
|
||||
pin = gpio_to_pin(range, gc, offset);
|
||||
ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs));
|
||||
mutex_unlock(&pctldev->mutex);
|
||||
|
||||
|
@ -1148,14 +1148,14 @@ static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
|
||||
static int chv_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
return pinctrl_gpio_direction_input(chip, offset);
|
||||
}
|
||||
|
||||
static int chv_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
chv_gpio_set(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static const struct gpio_chip chv_gpio_chip = {
|
||||
|
@ -992,14 +992,14 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
|
||||
static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
return pinctrl_gpio_direction_input(chip, offset);
|
||||
}
|
||||
|
||||
static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
intel_gpio_set(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static const struct gpio_chip intel_gpio_chip = {
|
||||
|
@ -541,7 +541,7 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
|
||||
|
||||
static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
return pinctrl_gpio_direction_input(chip, offset);
|
||||
}
|
||||
|
||||
static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
|
||||
@ -549,7 +549,7 @@ static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
|
||||
{
|
||||
lp_gpio_set(chip, offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int lp_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
|
@ -510,17 +510,12 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
|
||||
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
|
||||
int value)
|
||||
{
|
||||
mtk_gpio_set(chip, gpio, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + gpio);
|
||||
return pinctrl_gpio_direction_output(chip, gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
|
||||
@ -569,7 +564,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
|
||||
chip->parent = hw->dev;
|
||||
chip->request = gpiochip_generic_request;
|
||||
chip->free = gpiochip_generic_free;
|
||||
chip->direction_input = mtk_gpio_direction_input;
|
||||
chip->direction_input = pinctrl_gpio_direction_input;
|
||||
chip->direction_output = mtk_gpio_direction_output;
|
||||
chip->get = mtk_gpio_get;
|
||||
chip->set = mtk_gpio_set;
|
||||
|
@ -808,17 +808,11 @@ static const struct pinmux_ops mtk_pmx_ops = {
|
||||
.gpio_request_enable = mtk_pmx_gpio_request_enable,
|
||||
};
|
||||
|
||||
static int mtk_gpio_direction_input(struct gpio_chip *chip,
|
||||
unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
{
|
||||
mtk_gpio_set(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
|
||||
@ -898,7 +892,7 @@ static const struct gpio_chip mtk_gpio_chip = {
|
||||
.request = gpiochip_generic_request,
|
||||
.free = gpiochip_generic_free,
|
||||
.get_direction = mtk_gpio_get_direction,
|
||||
.direction_input = mtk_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = mtk_gpio_direction_output,
|
||||
.get = mtk_gpio_get,
|
||||
.set = mtk_gpio_set,
|
||||
|
@ -916,7 +916,7 @@ static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
|
||||
if (gpio >= hw->soc->npins)
|
||||
return -EINVAL;
|
||||
|
||||
return pinctrl_gpio_direction_input(chip->base + gpio);
|
||||
return pinctrl_gpio_direction_input(chip, gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
|
||||
@ -929,7 +929,7 @@ static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
|
||||
|
||||
mtk_gpio_set(chip, gpio, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + gpio);
|
||||
return pinctrl_gpio_direction_output(chip, gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
|
||||
|
@ -171,7 +171,7 @@ static int npcmgpio_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
struct npcm7xx_gpio *bank = gpiochip_get_data(chip);
|
||||
int ret;
|
||||
|
||||
ret = pinctrl_gpio_direction_input(offset + chip->base);
|
||||
ret = pinctrl_gpio_direction_input(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -188,7 +188,7 @@ static int npcmgpio_direction_output(struct gpio_chip *chip,
|
||||
dev_dbg(chip->parent, "gpio_direction_output: offset%d = %x\n", offset,
|
||||
value);
|
||||
|
||||
ret = pinctrl_gpio_direction_output(offset + chip->base);
|
||||
ret = pinctrl_gpio_direction_output(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -201,19 +201,13 @@ static int npcmgpio_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
int ret;
|
||||
|
||||
dev_dbg(chip->parent, "gpio_request: offset%d\n", offset);
|
||||
ret = pinctrl_gpio_request(offset + chip->base);
|
||||
ret = pinctrl_gpio_request(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return bank->request(chip, offset);
|
||||
}
|
||||
|
||||
static void npcmgpio_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
dev_dbg(chip->parent, "gpio_free: offset%d\n", offset);
|
||||
pinctrl_gpio_free(offset + chip->base);
|
||||
}
|
||||
|
||||
static void npcmgpio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct gpio_chip *gc;
|
||||
@ -1916,7 +1910,7 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl)
|
||||
pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output;
|
||||
pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request;
|
||||
pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request;
|
||||
pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free;
|
||||
pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free;
|
||||
id++;
|
||||
}
|
||||
|
||||
|
@ -173,7 +173,7 @@ static int npcmgpio_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
struct npcm8xx_gpio *bank = gpiochip_get_data(chip);
|
||||
int ret;
|
||||
|
||||
ret = pinctrl_gpio_direction_input(offset + chip->base);
|
||||
ret = pinctrl_gpio_direction_input(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -186,7 +186,7 @@ static int npcmgpio_direction_output(struct gpio_chip *chip,
|
||||
struct npcm8xx_gpio *bank = gpiochip_get_data(chip);
|
||||
int ret;
|
||||
|
||||
ret = pinctrl_gpio_direction_output(offset + chip->base);
|
||||
ret = pinctrl_gpio_direction_output(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -198,18 +198,13 @@ static int npcmgpio_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
struct npcm8xx_gpio *bank = gpiochip_get_data(chip);
|
||||
int ret;
|
||||
|
||||
ret = pinctrl_gpio_request(offset + chip->base);
|
||||
ret = pinctrl_gpio_request(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return bank->request(chip, offset);
|
||||
}
|
||||
|
||||
static void npcmgpio_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
pinctrl_gpio_free(offset + chip->base);
|
||||
}
|
||||
|
||||
static void npcmgpio_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
unsigned long sts, en, bit;
|
||||
@ -2388,7 +2383,7 @@ static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl)
|
||||
pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output;
|
||||
pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request;
|
||||
pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request;
|
||||
pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free;
|
||||
pctrl->gpio_bank[id].gc.free = pinctrl_gpio_free;
|
||||
for (i = 0 ; i < NPCM8XX_DEBOUNCE_MAX ; i++)
|
||||
pctrl->gpio_bank[id].debounce.set_val[i] = false;
|
||||
pctrl->gpio_bank[id].gc.add_pin_ranges = npcmgpio_add_pin_ranges;
|
||||
|
@ -500,16 +500,11 @@ static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset,
|
||||
"GPIO_SIGNAL_OUT_REG update failed: %d\n", ret);
|
||||
}
|
||||
|
||||
static int as3722_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int as3722_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
{
|
||||
as3722_gpio_set(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int as3722_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
|
||||
@ -526,7 +521,7 @@ static const struct gpio_chip as3722_gpio_chip = {
|
||||
.free = gpiochip_generic_free,
|
||||
.get = as3722_gpio_get,
|
||||
.set = as3722_gpio_set,
|
||||
.direction_input = as3722_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = as3722_gpio_direction_output,
|
||||
.to_irq = as3722_gpio_to_irq,
|
||||
.can_sleep = true,
|
||||
|
@ -124,11 +124,6 @@ static int axp20x_gpio_get_reg(unsigned int offset)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct axp20x_pctl *pctl = gpiochip_get_data(chip);
|
||||
@ -474,7 +469,7 @@ static int axp20x_pctl_probe(struct platform_device *pdev)
|
||||
pctl->chip.get = axp20x_gpio_get;
|
||||
pctl->chip.get_direction = axp20x_gpio_get_direction;
|
||||
pctl->chip.set = axp20x_gpio_set;
|
||||
pctl->chip.direction_input = axp20x_gpio_input;
|
||||
pctl->chip.direction_input = pinctrl_gpio_direction_input;
|
||||
pctl->chip.direction_output = axp20x_gpio_output;
|
||||
|
||||
pctl->desc = of_device_get_match_data(dev);
|
||||
|
@ -554,7 +554,7 @@ out:
|
||||
|
||||
static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(gc->base + off);
|
||||
return pinctrl_gpio_direction_input(gc, off);
|
||||
}
|
||||
|
||||
static int cy8c95x0_gpio_direction_output(struct gpio_chip *gc,
|
||||
@ -571,7 +571,7 @@ static int cy8c95x0_gpio_direction_output(struct gpio_chip *gc,
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return pinctrl_gpio_direction_output(gc->base + off);
|
||||
return pinctrl_gpio_direction_output(gc, off);
|
||||
}
|
||||
|
||||
static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off)
|
||||
|
@ -133,6 +133,8 @@ struct ingenic_pinctrl {
|
||||
struct pinctrl_pin_desc *pdesc;
|
||||
|
||||
const struct ingenic_chip_info *info;
|
||||
|
||||
struct gpio_chip *gc;
|
||||
};
|
||||
|
||||
struct ingenic_gpio_chip {
|
||||
@ -3558,17 +3560,11 @@ static int ingenic_gpio_get(struct gpio_chip *gc, unsigned int offset)
|
||||
return (int) ingenic_gpio_get_value(jzgc, offset);
|
||||
}
|
||||
|
||||
static int ingenic_gpio_direction_input(struct gpio_chip *gc,
|
||||
unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(gc->base + offset);
|
||||
}
|
||||
|
||||
static int ingenic_gpio_direction_output(struct gpio_chip *gc,
|
||||
unsigned int offset, int value)
|
||||
{
|
||||
ingenic_gpio_set(gc, offset, value);
|
||||
return pinctrl_gpio_direction_output(gc->base + offset);
|
||||
return pinctrl_gpio_direction_output(gc, offset);
|
||||
}
|
||||
|
||||
static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,
|
||||
@ -3678,7 +3674,7 @@ static int ingenic_gpio_irq_request(struct irq_data *data)
|
||||
irq_hw_number_t irq = irqd_to_hwirq(data);
|
||||
int ret;
|
||||
|
||||
ret = ingenic_gpio_direction_input(gpio_chip, irq);
|
||||
ret = pinctrl_gpio_direction_input(gpio_chip, irq);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -4052,7 +4048,8 @@ static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
|
||||
break;
|
||||
|
||||
case PIN_CONFIG_OUTPUT:
|
||||
ret = pinctrl_gpio_direction_output(pin);
|
||||
ret = pinctrl_gpio_direction_output(jzpc->gc,
|
||||
pin - jzpc->gc->base);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -4172,6 +4169,8 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,
|
||||
if (!jzgc)
|
||||
return -ENOMEM;
|
||||
|
||||
jzpc->gc = &jzgc->gc;
|
||||
|
||||
jzgc->jzpc = jzpc;
|
||||
jzgc->reg_base = bank * jzpc->info->reg_offset;
|
||||
|
||||
@ -4192,7 +4191,7 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,
|
||||
|
||||
jzgc->gc.set = ingenic_gpio_set;
|
||||
jzgc->gc.get = ingenic_gpio_get;
|
||||
jzgc->gc.direction_input = ingenic_gpio_direction_input;
|
||||
jzgc->gc.direction_input = pinctrl_gpio_direction_input;
|
||||
jzgc->gc.direction_output = ingenic_gpio_direction_output;
|
||||
jzgc->gc.get_direction = ingenic_gpio_get_direction;
|
||||
jzgc->gc.request = gpiochip_generic_request;
|
||||
|
@ -1776,12 +1776,6 @@ static int ocelot_gpio_get_direction(struct gpio_chip *chip,
|
||||
return GPIO_LINE_DIRECTION_IN;
|
||||
}
|
||||
|
||||
static int ocelot_gpio_direction_input(struct gpio_chip *chip,
|
||||
unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int ocelot_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned int offset, int value)
|
||||
{
|
||||
@ -1795,7 +1789,7 @@ static int ocelot_gpio_direction_output(struct gpio_chip *chip,
|
||||
regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset),
|
||||
pin);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static const struct gpio_chip ocelot_gpiolib_chip = {
|
||||
@ -1804,7 +1798,7 @@ static const struct gpio_chip ocelot_gpiolib_chip = {
|
||||
.set = ocelot_gpio_set,
|
||||
.get = ocelot_gpio_get,
|
||||
.get_direction = ocelot_gpio_get_direction,
|
||||
.direction_input = ocelot_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = ocelot_gpio_direction_output,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
@ -286,17 +286,11 @@ static void rk805_gpio_set(struct gpio_chip *chip,
|
||||
offset, value);
|
||||
}
|
||||
|
||||
static int rk805_gpio_direction_input(struct gpio_chip *chip,
|
||||
unsigned int offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int rk805_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned int offset, int value)
|
||||
{
|
||||
rk805_gpio_set(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
@ -330,7 +324,7 @@ static const struct gpio_chip rk805_gpio_chip = {
|
||||
.get_direction = rk805_gpio_get_direction,
|
||||
.get = rk805_gpio_get,
|
||||
.set = rk805_gpio_set,
|
||||
.direction_input = rk805_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = rk805_gpio_direction_output,
|
||||
.can_sleep = true,
|
||||
.base = -1,
|
||||
|
@ -717,20 +717,13 @@ static void st_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||
__st_gpio_set(bank, offset, value);
|
||||
}
|
||||
|
||||
static int st_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
pinctrl_gpio_direction_input(chip->base + offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int st_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
{
|
||||
struct st_gpio_bank *bank = gpiochip_get_data(chip);
|
||||
|
||||
__st_gpio_set(bank, offset, value);
|
||||
pinctrl_gpio_direction_output(chip->base + offset);
|
||||
pinctrl_gpio_direction_output(chip, offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1330,7 +1323,7 @@ static int st_gpio_irq_request_resources(struct irq_data *d)
|
||||
{
|
||||
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
|
||||
|
||||
st_gpio_direction_input(gc, d->hwirq);
|
||||
pinctrl_gpio_direction_input(gc, d->hwirq);
|
||||
|
||||
return gpiochip_reqres_irq(gc, d->hwirq);
|
||||
}
|
||||
@ -1488,7 +1481,7 @@ static const struct gpio_chip st_gpio_template = {
|
||||
.free = gpiochip_generic_free,
|
||||
.get = st_gpio_get,
|
||||
.set = st_gpio_set,
|
||||
.direction_input = st_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = st_gpio_direction_output,
|
||||
.get_direction = st_gpio_get_direction,
|
||||
.ngpio = ST_GPIO_PINS_PER_BANK,
|
||||
|
@ -135,12 +135,12 @@ static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
|
||||
if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
|
||||
return -EINVAL;
|
||||
|
||||
return pinctrl_gpio_request(gc->base + offset);
|
||||
return pinctrl_gpio_request(gc, offset);
|
||||
}
|
||||
|
||||
static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_free(gc->base + offset);
|
||||
return pinctrl_gpio_free(gc, offset);
|
||||
}
|
||||
|
||||
static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
|
||||
@ -164,7 +164,7 @@ static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
|
||||
|
||||
static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(gc->base + offset);
|
||||
return pinctrl_gpio_direction_input(gc, offset);
|
||||
}
|
||||
|
||||
static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
|
||||
@ -172,7 +172,7 @@ static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
|
||||
{
|
||||
gpio_pin_set_value(gpiochip_get_data(gc), offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(gc->base + offset);
|
||||
return pinctrl_gpio_direction_output(gc, offset);
|
||||
}
|
||||
|
||||
static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
|
||||
|
@ -1056,7 +1056,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = pinctrl_gpio_request(chip->base + offset);
|
||||
ret = pinctrl_gpio_request(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -1181,7 +1181,7 @@ static void rzg2l_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
unsigned int virq;
|
||||
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
|
||||
virq = irq_find_mapping(chip->irq.domain, offset);
|
||||
if (virq)
|
||||
|
@ -754,7 +754,7 @@ static int rzv2m_gpio_request(struct gpio_chip *chip, unsigned int offset)
|
||||
u8 bit = RZV2M_PIN_ID_TO_PIN(offset);
|
||||
int ret;
|
||||
|
||||
ret = pinctrl_gpio_request(chip->base + offset);
|
||||
ret = pinctrl_gpio_request(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -832,7 +832,7 @@ static int rzv2m_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||
|
||||
static void rzv2m_gpio_free(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
|
||||
/*
|
||||
* Set the GPIO as an input to ensure that the next GPIO request won't
|
||||
|
@ -204,14 +204,13 @@ static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
|
||||
static int plgpio_request(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct plgpio *plgpio = gpiochip_get_data(chip);
|
||||
int gpio = chip->base + offset;
|
||||
unsigned long flags;
|
||||
int ret = 0;
|
||||
|
||||
if (offset >= chip->ngpio)
|
||||
return -EINVAL;
|
||||
|
||||
ret = pinctrl_gpio_request(gpio);
|
||||
ret = pinctrl_gpio_request(chip, offset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@ -249,14 +248,13 @@ err1:
|
||||
if (!IS_ERR(plgpio->clk))
|
||||
clk_disable(plgpio->clk);
|
||||
err0:
|
||||
pinctrl_gpio_free(gpio);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void plgpio_free(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
struct plgpio *plgpio = gpiochip_get_data(chip);
|
||||
int gpio = chip->base + offset;
|
||||
unsigned long flags;
|
||||
|
||||
if (offset >= chip->ngpio)
|
||||
@ -280,7 +278,7 @@ disable_clk:
|
||||
if (!IS_ERR(plgpio->clk))
|
||||
clk_disable(plgpio->clk);
|
||||
|
||||
pinctrl_gpio_free(gpio);
|
||||
pinctrl_gpio_free(chip, offset);
|
||||
}
|
||||
|
||||
/* PLGPIO IRQ */
|
||||
|
@ -916,16 +916,6 @@ static struct pinctrl_desc starfive_desc = {
|
||||
.custom_conf_items = starfive_pinconf_custom_conf_items,
|
||||
};
|
||||
|
||||
static int starfive_gpio_request(struct gpio_chip *gc, unsigned int gpio)
|
||||
{
|
||||
return pinctrl_gpio_request(gc->base + gpio);
|
||||
}
|
||||
|
||||
static void starfive_gpio_free(struct gpio_chip *gc, unsigned int gpio)
|
||||
{
|
||||
pinctrl_gpio_free(gc->base + gpio);
|
||||
}
|
||||
|
||||
static int starfive_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)
|
||||
{
|
||||
struct starfive_pinctrl *sfp = container_of(gc, struct starfive_pinctrl, gc);
|
||||
@ -1309,8 +1299,8 @@ static int starfive_probe(struct platform_device *pdev)
|
||||
|
||||
sfp->gc.label = dev_name(dev);
|
||||
sfp->gc.owner = THIS_MODULE;
|
||||
sfp->gc.request = starfive_gpio_request;
|
||||
sfp->gc.free = starfive_gpio_free;
|
||||
sfp->gc.request = pinctrl_gpio_request;
|
||||
sfp->gc.free = pinctrl_gpio_free;
|
||||
sfp->gc.get_direction = starfive_gpio_get_direction;
|
||||
sfp->gc.direction_input = starfive_gpio_direction_input;
|
||||
sfp->gc.direction_output = starfive_gpio_direction_output;
|
||||
|
@ -545,16 +545,6 @@ static const struct pinconf_ops jh7110_pinconf_ops = {
|
||||
.is_generic = true,
|
||||
};
|
||||
|
||||
static int jh7110_gpio_request(struct gpio_chip *gc, unsigned int gpio)
|
||||
{
|
||||
return pinctrl_gpio_request(gc->base + gpio);
|
||||
}
|
||||
|
||||
static void jh7110_gpio_free(struct gpio_chip *gc, unsigned int gpio)
|
||||
{
|
||||
pinctrl_gpio_free(gc->base + gpio);
|
||||
}
|
||||
|
||||
static int jh7110_gpio_get_direction(struct gpio_chip *gc,
|
||||
unsigned int gpio)
|
||||
{
|
||||
@ -940,8 +930,8 @@ int jh7110_pinctrl_probe(struct platform_device *pdev)
|
||||
|
||||
sfp->gc.label = dev_name(dev);
|
||||
sfp->gc.owner = THIS_MODULE;
|
||||
sfp->gc.request = jh7110_gpio_request;
|
||||
sfp->gc.free = jh7110_gpio_free;
|
||||
sfp->gc.request = pinctrl_gpio_request;
|
||||
sfp->gc.free = pinctrl_gpio_free;
|
||||
sfp->gc.get_direction = jh7110_gpio_get_direction;
|
||||
sfp->gc.direction_input = jh7110_gpio_direction_input;
|
||||
sfp->gc.direction_output = jh7110_gpio_direction_output;
|
||||
|
@ -217,12 +217,7 @@ static int stm32_gpio_request(struct gpio_chip *chip, unsigned offset)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return pinctrl_gpio_request(chip->base + offset);
|
||||
}
|
||||
|
||||
static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
pinctrl_gpio_free(chip->base + offset);
|
||||
return pinctrl_gpio_request(chip, offset);
|
||||
}
|
||||
|
||||
static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset)
|
||||
@ -239,18 +234,13 @@ static void stm32_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
||||
__stm32_gpio_set(bank, offset, value);
|
||||
}
|
||||
|
||||
static int stm32_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int stm32_gpio_direction_output(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
{
|
||||
struct stm32_gpio_bank *bank = gpiochip_get_data(chip);
|
||||
|
||||
__stm32_gpio_set(bank, offset, value);
|
||||
pinctrl_gpio_direction_output(chip->base + offset);
|
||||
pinctrl_gpio_direction_output(chip, offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -316,10 +306,10 @@ static int stm32_gpio_init_valid_mask(struct gpio_chip *chip,
|
||||
|
||||
static const struct gpio_chip stm32_gpio_template = {
|
||||
.request = stm32_gpio_request,
|
||||
.free = stm32_gpio_free,
|
||||
.free = pinctrl_gpio_free,
|
||||
.get = stm32_gpio_get,
|
||||
.set = stm32_gpio_set,
|
||||
.direction_input = stm32_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = stm32_gpio_direction_output,
|
||||
.to_irq = stm32_gpio_to_irq,
|
||||
.get_direction = stm32_gpio_get_direction,
|
||||
@ -381,7 +371,7 @@ static int stm32_gpio_irq_request_resources(struct irq_data *irq_data)
|
||||
struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
|
||||
int ret;
|
||||
|
||||
ret = stm32_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq);
|
||||
ret = pinctrl_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -526,16 +526,11 @@ static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
|
||||
wmt_clearbits(data, reg_data_out, BIT(bit));
|
||||
}
|
||||
|
||||
static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + offset);
|
||||
}
|
||||
|
||||
static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
|
||||
int value)
|
||||
{
|
||||
wmt_gpio_set_value(chip, offset, value);
|
||||
return pinctrl_gpio_direction_output(chip->base + offset);
|
||||
return pinctrl_gpio_direction_output(chip, offset);
|
||||
}
|
||||
|
||||
static const struct gpio_chip wmt_gpio_chip = {
|
||||
@ -544,7 +539,7 @@ static const struct gpio_chip wmt_gpio_chip = {
|
||||
.request = gpiochip_generic_request,
|
||||
.free = gpiochip_generic_free,
|
||||
.get_direction = wmt_gpio_get_direction,
|
||||
.direction_input = wmt_gpio_direction_input,
|
||||
.direction_input = pinctrl_gpio_direction_input,
|
||||
.direction_output = wmt_gpio_direction_output,
|
||||
.get = wmt_gpio_get_value,
|
||||
.set = wmt_gpio_set_value,
|
||||
|
@ -605,9 +605,6 @@ int devm_gpiochip_add_data_with_key(struct device *dev, struct gpio_chip *gc,
|
||||
void *data, struct lock_class_key *lock_key,
|
||||
struct lock_class_key *request_key);
|
||||
|
||||
struct gpio_chip *gpiochip_find(void *data,
|
||||
int (*match)(struct gpio_chip *gc, void *data));
|
||||
|
||||
struct gpio_device *gpio_device_find(void *data,
|
||||
int (*match)(struct gpio_chip *gc, void *data));
|
||||
struct gpio_device *gpio_device_find_by_label(const char *label);
|
||||
|
@ -17,6 +17,7 @@
|
||||
#include <linux/pinctrl/pinctrl-state.h>
|
||||
|
||||
struct device;
|
||||
struct gpio_chip;
|
||||
|
||||
/* This struct is private to the core and should be regarded as a cookie */
|
||||
struct pinctrl;
|
||||
@ -25,27 +26,30 @@ struct pinctrl_state;
|
||||
#ifdef CONFIG_PINCTRL
|
||||
|
||||
/* External interface to pin control */
|
||||
extern bool pinctrl_gpio_can_use_line(unsigned gpio);
|
||||
extern int pinctrl_gpio_request(unsigned gpio);
|
||||
extern void pinctrl_gpio_free(unsigned gpio);
|
||||
extern int pinctrl_gpio_direction_input(unsigned gpio);
|
||||
extern int pinctrl_gpio_direction_output(unsigned gpio);
|
||||
extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);
|
||||
bool pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset);
|
||||
int pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset);
|
||||
void pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset);
|
||||
int pinctrl_gpio_direction_input(struct gpio_chip *gc,
|
||||
unsigned int offset);
|
||||
int pinctrl_gpio_direction_output(struct gpio_chip *gc,
|
||||
unsigned int offset);
|
||||
int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
|
||||
unsigned long config);
|
||||
|
||||
extern struct pinctrl * __must_check pinctrl_get(struct device *dev);
|
||||
extern void pinctrl_put(struct pinctrl *p);
|
||||
extern struct pinctrl_state * __must_check pinctrl_lookup_state(struct pinctrl *p,
|
||||
const char *name);
|
||||
extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s);
|
||||
struct pinctrl * __must_check pinctrl_get(struct device *dev);
|
||||
void pinctrl_put(struct pinctrl *p);
|
||||
struct pinctrl_state * __must_check pinctrl_lookup_state(struct pinctrl *p,
|
||||
const char *name);
|
||||
int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s);
|
||||
|
||||
extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev);
|
||||
extern void devm_pinctrl_put(struct pinctrl *p);
|
||||
extern int pinctrl_select_default_state(struct device *dev);
|
||||
struct pinctrl * __must_check devm_pinctrl_get(struct device *dev);
|
||||
void devm_pinctrl_put(struct pinctrl *p);
|
||||
int pinctrl_select_default_state(struct device *dev);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern int pinctrl_pm_select_default_state(struct device *dev);
|
||||
extern int pinctrl_pm_select_sleep_state(struct device *dev);
|
||||
extern int pinctrl_pm_select_idle_state(struct device *dev);
|
||||
int pinctrl_pm_select_default_state(struct device *dev);
|
||||
int pinctrl_pm_select_sleep_state(struct device *dev);
|
||||
int pinctrl_pm_select_idle_state(struct device *dev);
|
||||
#else
|
||||
static inline int pinctrl_pm_select_default_state(struct device *dev)
|
||||
{
|
||||
@ -63,31 +67,38 @@ static inline int pinctrl_pm_select_idle_state(struct device *dev)
|
||||
|
||||
#else /* !CONFIG_PINCTRL */
|
||||
|
||||
static inline bool pinctrl_gpio_can_use_line(unsigned gpio)
|
||||
static inline bool
|
||||
pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static inline int pinctrl_gpio_request(unsigned gpio)
|
||||
static inline int
|
||||
pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void pinctrl_gpio_free(unsigned gpio)
|
||||
static inline void
|
||||
pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int pinctrl_gpio_direction_input(unsigned gpio)
|
||||
static inline int
|
||||
pinctrl_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int pinctrl_gpio_direction_output(unsigned gpio)
|
||||
static inline int
|
||||
pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
|
||||
static inline int
|
||||
pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
|
||||
unsigned long config)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user