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iio: imu: st_lsm6dsx: add possibility to select drdy pin
Add capability to route data ready signal on pin 1 or pin 2 of the package Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -37,11 +37,14 @@
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/platform_data/st_sensors_pdata.h>
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#include "st_lsm6dsx.h"
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#define ST_LSM6DSX_REG_ACC_DEC_MASK GENMASK(2, 0)
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#define ST_LSM6DSX_REG_GYRO_DEC_MASK GENMASK(5, 3)
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#define ST_LSM6DSX_REG_INT1_ADDR 0x0d
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#define ST_LSM6DSX_REG_INT2_ADDR 0x0e
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#define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK BIT(3)
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#define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
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#define ST_LSM6DSX_REG_RESET_ADDR 0x12
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@ -532,10 +535,56 @@ static const struct iio_info st_lsm6dsx_gyro_info = {
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static const unsigned long st_lsm6dsx_available_scan_masks[] = {0x7, 0x0};
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static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
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{
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struct device_node *np = hw->dev->of_node;
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int err;
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if (!np)
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return -EINVAL;
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err = of_property_read_u32(np, "st,drdy-int-pin", drdy_pin);
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if (err == -ENODATA) {
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/* if the property has not been specified use default value */
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*drdy_pin = 1;
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err = 0;
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}
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return err;
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}
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static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
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{
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int err = 0, drdy_pin;
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if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) {
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struct st_sensors_platform_data *pdata;
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struct device *dev = hw->dev;
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pdata = (struct st_sensors_platform_data *)dev->platform_data;
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drdy_pin = pdata ? pdata->drdy_int_pin : 1;
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}
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switch (drdy_pin) {
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case 1:
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*drdy_reg = ST_LSM6DSX_REG_INT1_ADDR;
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break;
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case 2:
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*drdy_reg = ST_LSM6DSX_REG_INT2_ADDR;
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break;
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default:
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dev_err(hw->dev, "unsupported data ready pin\n");
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err = -EINVAL;
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break;
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}
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return err;
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}
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static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
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{
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u8 data, drdy_int_reg;
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int err;
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u8 data;
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data = ST_LSM6DSX_REG_RESET_MASK;
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err = hw->tf->write(hw->dev, ST_LSM6DSX_REG_RESET_ADDR, sizeof(data),
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@ -563,14 +612,12 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
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return err;
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/* enable FIFO watermak interrupt */
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err = st_lsm6dsx_write_with_mask(hw, ST_LSM6DSX_REG_INT1_ADDR,
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ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, 1);
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err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg);
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if (err < 0)
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return err;
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/* redirect INT2 on INT1 */
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return st_lsm6dsx_write_with_mask(hw, ST_LSM6DSX_REG_INT2_ON_INT1_ADDR,
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ST_LSM6DSX_REG_INT2_ON_INT1_MASK, 1);
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return st_lsm6dsx_write_with_mask(hw, drdy_int_reg,
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ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, 1);
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}
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static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
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