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ARM: dts: Add usb2phy to exynos5250

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Add support to PHY of USB2 of the Exynos5250 SoC.

Signed-off-by: Kamil Debski <k.debski@samsung.com>
[gautam.vivek@samsung.com: Split the usb phy entries]
[gautam.vivek@samsung.com: Added phy entry for OHCI also along with EHCI]
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kamil Debski 2014-05-22 07:50:48 +09:00 committed by Kukjin Kim
parent dfbbdbf440
commit dba2f05880
1 changed files with 22 additions and 0 deletions
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22
arch/arm/boot/dts/exynos5250.dtsi
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@ -577,6 +577,12 @@
clocks = <&clock CLK_USB2>;
clock-names = "usbhost";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&usb2_phy_gen 1>;
};
};
usb@12120000 {
@ -586,6 +592,12 @@
clocks = <&clock CLK_USB2>;
clock-names = "usbhost";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&usb2_phy_gen 1>;
};
};
usb2_phy: usbphy@12130000 {
@ -603,6 +615,16 @@
};
};
usb2_phy_gen: phy@12130000 {
compatible = "samsung,exynos5250-usb2-phy";
reg = <0x12130000 0x100>;
clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
clock-names = "phy", "ref";
#phy-cells = <1>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
samsung,pmureg-phandle = <&pmu_system_controller>;
};
pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12dd0000 0x100>;