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usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register which adjusts (micro)frame length to value provided by "snps,quirk-frame-length-adjustment" property thus avoiding USB 2.0 devices to time-out over a longer run Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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3737c54418
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@ -143,6 +143,32 @@ static int dwc3_soft_reset(struct dwc3 *dwc)
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return 0;
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}
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/*
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* dwc3_frame_length_adjustment - Adjusts frame length if required
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* @dwc3: Pointer to our controller context structure
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* @fladj: Value of GFLADJ_30MHZ to adjust frame length
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*/
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static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
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{
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u32 reg;
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u32 dft;
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if (dwc->revision < DWC3_REVISION_250A)
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return;
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if (fladj == 0)
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return;
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reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
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dft = reg & DWC3_GFLADJ_30MHZ_MASK;
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if (!dev_WARN_ONCE(dwc->dev, dft == fladj,
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"request value same as default, ignoring\n")) {
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reg &= ~DWC3_GFLADJ_30MHZ_MASK;
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reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
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dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
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}
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}
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/**
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* dwc3_free_one_event_buffer - Frees one event buffer
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* @dwc: Pointer to our controller context structure
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@ -779,6 +805,7 @@ static int dwc3_probe(struct platform_device *pdev)
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u8 lpm_nyet_threshold;
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u8 tx_de_emphasis;
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u8 hird_threshold;
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u32 fladj = 0;
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int ret;
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@ -886,6 +913,9 @@ static int dwc3_probe(struct platform_device *pdev)
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&tx_de_emphasis);
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of_property_read_string(node, "snps,hsphy_interface",
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&dwc->hsphy_interface);
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of_property_read_u32(node,
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"snps,quirk-frame-length-adjustment",
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&fladj);
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} else if (pdata) {
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dwc->maximum_speed = pdata->maximum_speed;
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dwc->has_lpm_erratum = pdata->has_lpm_erratum;
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@ -915,6 +945,7 @@ static int dwc3_probe(struct platform_device *pdev)
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tx_de_emphasis = pdata->tx_de_emphasis;
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dwc->hsphy_interface = pdata->hsphy_interface;
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fladj = pdata->fladj_value;
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}
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/* default to superspeed if no maximum_speed passed */
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@ -971,6 +1002,9 @@ static int dwc3_probe(struct platform_device *pdev)
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goto err1;
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}
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/* Adjust Frame Length */
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dwc3_frame_length_adjustment(dwc, fladj);
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usb_phy_set_suspend(dwc->usb2_phy, 0);
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usb_phy_set_suspend(dwc->usb3_phy, 0);
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ret = phy_power_on(dwc->usb2_generic_phy);
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@ -124,6 +124,7 @@
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#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
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#define DWC3_GHWPARAMS8 0xc600
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#define DWC3_GFLADJ 0xc630
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/* Device Registers */
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#define DWC3_DCFG 0xc700
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@ -234,6 +235,10 @@
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/* Global HWPARAMS6 Register */
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#define DWC3_GHWPARAMS6_EN_FPGA (1 << 7)
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/* Global Frame Length Adjustment Register */
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#define DWC3_GFLADJ_30MHZ_SDBND_SEL (1 << 7)
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#define DWC3_GFLADJ_30MHZ_MASK 0x3f
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/* Device Configuration Register */
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#define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
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#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
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@ -46,5 +46,7 @@ struct dwc3_platform_data {
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unsigned tx_de_emphasis_quirk:1;
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unsigned tx_de_emphasis:2;
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u32 fladj_value;
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const char *hsphy_interface;
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};
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