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@ -1739,6 +1739,56 @@ static struct sh_pfc_pin pinmux_pins[] = {
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SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
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};
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/* - AUDIO CLOCK ------------------------------------------------------------ */
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static const unsigned int audio_clk_a_pins[] = {
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/* CLK A */
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RCAR_GP_PIN(4, 25),
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};
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static const unsigned int audio_clk_a_mux[] = {
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AUDIO_CLKA_MARK,
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};
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static const unsigned int audio_clk_b_pins[] = {
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/* CLK B */
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RCAR_GP_PIN(4, 26),
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};
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static const unsigned int audio_clk_b_mux[] = {
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AUDIO_CLKB_MARK,
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};
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static const unsigned int audio_clk_c_pins[] = {
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/* CLK C */
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RCAR_GP_PIN(5, 27),
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};
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static const unsigned int audio_clk_c_mux[] = {
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AUDIO_CLKC_MARK,
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};
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static const unsigned int audio_clkout_pins[] = {
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/* CLK OUT */
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RCAR_GP_PIN(5, 16),
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};
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static const unsigned int audio_clkout_mux[] = {
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AUDIO_CLKOUT_MARK,
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};
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static const unsigned int audio_clkout_b_pins[] = {
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/* CLK OUT B */
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RCAR_GP_PIN(0, 23),
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};
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static const unsigned int audio_clkout_b_mux[] = {
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AUDIO_CLKOUT_B_MARK,
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};
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static const unsigned int audio_clkout_c_pins[] = {
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/* CLK OUT C */
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RCAR_GP_PIN(5, 27),
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};
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static const unsigned int audio_clkout_c_mux[] = {
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AUDIO_CLKOUT_C_MARK,
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};
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static const unsigned int audio_clkout_d_pins[] = {
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/* CLK OUT D */
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RCAR_GP_PIN(5, 20),
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};
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static const unsigned int audio_clkout_d_mux[] = {
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AUDIO_CLKOUT_D_MARK,
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};
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/* - DU RGB ----------------------------------------------------------------- */
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static const unsigned int du_rgb666_pins[] = {
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/* R[7:2], G[7:2], B[7:2] */
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@ -2961,6 +3011,189 @@ static const unsigned int sdhi3_wp_pins[] = {
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static const unsigned int sdhi3_wp_mux[] = {
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SD3_WP_MARK,
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};
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/* - SSI -------------------------------------------------------------------- */
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static const unsigned int ssi0_data_pins[] = {
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/* SDATA0 */
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RCAR_GP_PIN(4, 5),
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};
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static const unsigned int ssi0_data_mux[] = {
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SSI_SDATA0_MARK,
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};
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static const unsigned int ssi0129_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(4, 3), RCAR_GP_PIN(4, 4),
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};
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static const unsigned int ssi0129_ctrl_mux[] = {
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SSI_SCK0129_MARK, SSI_WS0129_MARK,
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};
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static const unsigned int ssi1_data_pins[] = {
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/* SDATA1 */
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RCAR_GP_PIN(4, 6),
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};
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static const unsigned int ssi1_data_mux[] = {
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SSI_SDATA1_MARK,
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};
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static const unsigned int ssi1_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 24),
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};
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static const unsigned int ssi1_ctrl_mux[] = {
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SSI_SCK1_MARK, SSI_WS1_MARK,
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};
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static const unsigned int ssi2_data_pins[] = {
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/* SDATA2 */
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RCAR_GP_PIN(4, 7),
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};
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static const unsigned int ssi2_data_mux[] = {
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SSI_SDATA2_MARK,
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};
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static const unsigned int ssi2_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 17),
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};
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static const unsigned int ssi2_ctrl_mux[] = {
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SSI_SCK2_MARK, SSI_WS2_MARK,
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};
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static const unsigned int ssi3_data_pins[] = {
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/* SDATA3 */
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RCAR_GP_PIN(4, 10),
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};
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static const unsigned int ssi3_data_mux[] = {
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SSI_SDATA3_MARK
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};
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static const unsigned int ssi34_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9),
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};
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static const unsigned int ssi34_ctrl_mux[] = {
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SSI_SCK34_MARK, SSI_WS34_MARK,
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};
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static const unsigned int ssi4_data_pins[] = {
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/* SDATA4 */
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RCAR_GP_PIN(4, 13),
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};
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static const unsigned int ssi4_data_mux[] = {
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SSI_SDATA4_MARK,
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};
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static const unsigned int ssi4_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
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};
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static const unsigned int ssi4_ctrl_mux[] = {
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SSI_SCK4_MARK, SSI_WS4_MARK,
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};
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static const unsigned int ssi5_pins[] = {
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/* SDATA5, SCK, WS */
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RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
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};
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static const unsigned int ssi5_mux[] = {
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SSI_SDATA5_MARK, SSI_SCK5_MARK, SSI_WS5_MARK,
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};
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static const unsigned int ssi5_b_pins[] = {
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/* SDATA5, SCK, WS */
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RCAR_GP_PIN(0, 26), RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
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};
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static const unsigned int ssi5_b_mux[] = {
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SSI_SDATA5_B_MARK, SSI_SCK5_B_MARK, SSI_WS5_B_MARK
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};
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static const unsigned int ssi5_c_pins[] = {
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/* SDATA5, SCK, WS */
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RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12),
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};
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static const unsigned int ssi5_c_mux[] = {
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SSI_SDATA5_C_MARK, SSI_SCK5_C_MARK, SSI_WS5_C_MARK,
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};
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static const unsigned int ssi6_pins[] = {
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/* SDATA6, SCK, WS */
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RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18),
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};
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static const unsigned int ssi6_mux[] = {
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SSI_SDATA6_MARK, SSI_SCK6_MARK, SSI_WS6_MARK,
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};
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static const unsigned int ssi6_b_pins[] = {
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/* SDATA6, SCK, WS */
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RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 27),
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};
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static const unsigned int ssi6_b_mux[] = {
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SSI_SDATA6_B_MARK, SSI_SCK6_B_MARK, SSI_WS6_B_MARK,
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};
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static const unsigned int ssi7_data_pins[] = {
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/* SDATA7 */
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RCAR_GP_PIN(4, 22),
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};
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static const unsigned int ssi7_data_mux[] = {
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SSI_SDATA7_MARK,
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};
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static const unsigned int ssi7_b_data_pins[] = {
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/* SDATA7 */
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RCAR_GP_PIN(4, 22),
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};
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static const unsigned int ssi7_b_data_mux[] = {
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SSI_SDATA7_B_MARK,
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};
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static const unsigned int ssi7_c_data_pins[] = {
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/* SDATA7 */
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RCAR_GP_PIN(1, 26),
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};
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static const unsigned int ssi7_c_data_mux[] = {
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SSI_SDATA7_C_MARK,
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};
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static const unsigned int ssi78_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 21),
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};
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static const unsigned int ssi78_ctrl_mux[] = {
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SSI_SCK78_MARK, SSI_WS78_MARK,
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};
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static const unsigned int ssi78_b_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 24),
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};
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static const unsigned int ssi78_b_ctrl_mux[] = {
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SSI_SCK78_B_MARK, SSI_WS78_B_MARK,
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};
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static const unsigned int ssi78_c_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 25),
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};
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static const unsigned int ssi78_c_ctrl_mux[] = {
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SSI_SCK78_C_MARK, SSI_WS78_C_MARK,
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};
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static const unsigned int ssi8_data_pins[] = {
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/* SDATA8 */
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RCAR_GP_PIN(4, 23),
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};
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static const unsigned int ssi8_data_mux[] = {
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SSI_SDATA8_MARK,
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};
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static const unsigned int ssi8_b_data_pins[] = {
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/* SDATA8 */
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RCAR_GP_PIN(4, 23),
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};
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static const unsigned int ssi8_b_data_mux[] = {
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SSI_SDATA8_B_MARK,
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};
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static const unsigned int ssi8_c_data_pins[] = {
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/* SDATA8 */
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RCAR_GP_PIN(1, 27),
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};
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static const unsigned int ssi8_c_data_mux[] = {
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SSI_SDATA8_C_MARK,
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};
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static const unsigned int ssi9_data_pins[] = {
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/* SDATA9 */
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RCAR_GP_PIN(4, 24),
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};
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static const unsigned int ssi9_data_mux[] = {
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SSI_SDATA9_MARK,
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};
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static const unsigned int ssi9_ctrl_pins[] = {
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/* SCK, WS */
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RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 11),
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};
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static const unsigned int ssi9_ctrl_mux[] = {
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SSI_SCK9_MARK, SSI_WS9_MARK,
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};
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/* - TPU0 ------------------------------------------------------------------- */
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static const unsigned int tpu0_to0_pins[] = {
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/* TO */
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@ -3014,59 +3247,110 @@ static const unsigned int usb2_pins[] = {
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static const unsigned int usb2_mux[] = {
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USB2_PWEN_MARK, USB2_OVC_MARK,
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};
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union vin_data {
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unsigned int data24[24];
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unsigned int data20[20];
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unsigned int data16[16];
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unsigned int data12[12];
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unsigned int data10[10];
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unsigned int data8[8];
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unsigned int data4[4];
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};
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#define VIN_DATA_PIN_GROUP(n, s) \
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{ \
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.name = #n#s, \
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.pins = n##_pins.data##s, \
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.mux = n##_mux.data##s, \
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.nr_pins = ARRAY_SIZE(n##_pins.data##s), \
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}
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/* - VIN0 ------------------------------------------------------------------- */
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static const unsigned int vin0_data_g_pins[] = {
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RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
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RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
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static const union vin_data vin0_data_pins = {
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.data24 = {
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/* B */
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RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
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RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
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RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6),
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RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
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/* G */
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RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
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RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
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RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
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RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
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/* R */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
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RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
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RCAR_GP_PIN(0, 26), RCAR_GP_PIN(1, 11),
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},
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};
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static const union vin_data vin0_data_mux = {
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.data24 = {
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/* B */
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VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK,
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VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
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VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
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|
|
|
|
VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI0_G0_MARK, VI0_G1_MARK,
|
|
|
|
|
VI0_G2_MARK, VI0_G3_MARK,
|
|
|
|
|
VI0_G4_MARK, VI0_G5_MARK,
|
|
|
|
|
VI0_G6_MARK, VI0_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI0_R0_MARK, VI0_R1_MARK,
|
|
|
|
|
VI0_R2_MARK, VI0_R3_MARK,
|
|
|
|
|
VI0_R4_MARK, VI0_R5_MARK,
|
|
|
|
|
VI0_R6_MARK, VI0_R7_MARK,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data18_pins[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
|
|
|
|
|
RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6),
|
|
|
|
|
RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
|
|
|
|
|
/* G */
|
|
|
|
|
RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
|
|
|
|
|
RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
|
|
|
|
|
RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_g_mux[] = {
|
|
|
|
|
VI0_G0_MARK, VI0_G1_MARK, VI0_G2_MARK,
|
|
|
|
|
VI0_G3_MARK, VI0_G4_MARK, VI0_G5_MARK,
|
|
|
|
|
VI0_G6_MARK, VI0_G7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_r_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6),
|
|
|
|
|
RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
|
|
|
|
|
/* R */
|
|
|
|
|
RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
|
|
|
|
|
RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
|
|
|
|
|
RCAR_GP_PIN(0, 26), RCAR_GP_PIN(1, 11),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_r_mux[] = {
|
|
|
|
|
VI0_R0_MARK, VI0_R1_MARK, VI0_R2_MARK,
|
|
|
|
|
VI0_R3_MARK, VI0_R4_MARK, VI0_R5_MARK,
|
|
|
|
|
static const unsigned int vin0_data18_mux[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
|
|
|
|
|
VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
|
|
|
|
|
VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI0_G2_MARK, VI0_G3_MARK,
|
|
|
|
|
VI0_G4_MARK, VI0_G5_MARK,
|
|
|
|
|
VI0_G6_MARK, VI0_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI0_R2_MARK, VI0_R3_MARK,
|
|
|
|
|
VI0_R4_MARK, VI0_R5_MARK,
|
|
|
|
|
VI0_R6_MARK, VI0_R7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_b_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
|
|
|
|
|
RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6),
|
|
|
|
|
RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
|
|
|
|
|
static const unsigned int vin0_sync_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 12), /* HSYNC */
|
|
|
|
|
RCAR_GP_PIN(0, 13), /* VSYNC */
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_b_mux[] = {
|
|
|
|
|
VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, VI0_DATA2_VI0_B2_MARK,
|
|
|
|
|
VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
|
|
|
|
|
VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_hsync_signal_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 12),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_hsync_signal_mux[] = {
|
|
|
|
|
static const unsigned int vin0_sync_mux[] = {
|
|
|
|
|
VI0_HSYNC_N_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_vsync_signal_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 13),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_vsync_signal_mux[] = {
|
|
|
|
|
VI0_VSYNC_N_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_field_signal_pins[] = {
|
|
|
|
|
static const unsigned int vin0_field_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 15),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_field_signal_mux[] = {
|
|
|
|
|
static const unsigned int vin0_field_mux[] = {
|
|
|
|
|
VI0_FIELD_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_enable_pins[] = {
|
|
|
|
|
static const unsigned int vin0_clkenb_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 14),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_data_enable_mux[] = {
|
|
|
|
|
static const unsigned int vin0_clkenb_mux[] = {
|
|
|
|
|
VI0_CLKENB_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin0_clk_pins[] = {
|
|
|
|
@ -3076,15 +3360,91 @@ static const unsigned int vin0_clk_mux[] = {
|
|
|
|
|
VI0_CLK_MARK,
|
|
|
|
|
};
|
|
|
|
|
/* - VIN1 ------------------------------------------------------------------- */
|
|
|
|
|
static const unsigned int vin1_data_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
|
|
|
|
|
RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
|
|
|
|
|
RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
|
|
|
|
|
static const union vin_data vin1_data_pins = {
|
|
|
|
|
.data24 = {
|
|
|
|
|
/* B */
|
|
|
|
|
RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
|
|
|
|
|
RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
|
|
|
|
|
RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
|
|
|
|
|
RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
|
|
|
|
|
/* G */
|
|
|
|
|
RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
|
|
|
|
|
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20),
|
|
|
|
|
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12),
|
|
|
|
|
RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7),
|
|
|
|
|
/* R */
|
|
|
|
|
RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28),
|
|
|
|
|
RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4),
|
|
|
|
|
RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
|
|
|
|
|
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8),
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_data_mux[] = {
|
|
|
|
|
VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, VI1_DATA2_VI1_B2_MARK,
|
|
|
|
|
VI1_DATA3_VI1_B3_MARK, VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK,
|
|
|
|
|
static const union vin_data vin1_data_mux = {
|
|
|
|
|
.data24 = {
|
|
|
|
|
/* B */
|
|
|
|
|
VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK,
|
|
|
|
|
VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK,
|
|
|
|
|
VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK,
|
|
|
|
|
VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI1_G0_MARK, VI1_G1_MARK,
|
|
|
|
|
VI1_G2_MARK, VI1_G3_MARK,
|
|
|
|
|
VI1_G4_MARK, VI1_G5_MARK,
|
|
|
|
|
VI1_G6_MARK, VI1_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI1_R0_MARK, VI1_R1_MARK,
|
|
|
|
|
VI1_R2_MARK, VI1_R3_MARK,
|
|
|
|
|
VI1_R4_MARK, VI1_R5_MARK,
|
|
|
|
|
VI1_R6_MARK, VI1_R7_MARK,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_data18_pins[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
|
|
|
|
|
RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
|
|
|
|
|
RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
|
|
|
|
|
/* G */
|
|
|
|
|
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20),
|
|
|
|
|
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12),
|
|
|
|
|
RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7),
|
|
|
|
|
/* R */
|
|
|
|
|
RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4),
|
|
|
|
|
RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
|
|
|
|
|
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_data18_mux[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK,
|
|
|
|
|
VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK,
|
|
|
|
|
VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI1_G2_MARK, VI1_G3_MARK,
|
|
|
|
|
VI1_G4_MARK, VI1_G5_MARK,
|
|
|
|
|
VI1_G6_MARK, VI1_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI1_R2_MARK, VI1_R3_MARK,
|
|
|
|
|
VI1_R4_MARK, VI1_R5_MARK,
|
|
|
|
|
VI1_R6_MARK, VI1_R7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_sync_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 24), /* HSYNC */
|
|
|
|
|
RCAR_GP_PIN(1, 25), /* VSYNC */
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_sync_mux[] = {
|
|
|
|
|
VI1_HSYNC_N_MARK,
|
|
|
|
|
VI1_VSYNC_N_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_field_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 13),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_field_mux[] = {
|
|
|
|
|
VI1_FIELD_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_clkenb_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 26),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_clkenb_mux[] = {
|
|
|
|
|
VI1_CLKENB_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin1_clk_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(2, 9),
|
|
|
|
@ -3092,8 +3452,147 @@ static const unsigned int vin1_clk_pins[] = {
|
|
|
|
|
static const unsigned int vin1_clk_mux[] = {
|
|
|
|
|
VI1_CLK_MARK,
|
|
|
|
|
};
|
|
|
|
|
/* - VIN2 ----------------------------------------------------------------- */
|
|
|
|
|
static const union vin_data vin2_data_pins = {
|
|
|
|
|
.data24 = {
|
|
|
|
|
/* B */
|
|
|
|
|
RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
|
|
|
|
|
RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
|
|
|
|
|
RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
|
|
|
|
|
RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
|
|
|
|
|
/* G */
|
|
|
|
|
RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28),
|
|
|
|
|
RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10),
|
|
|
|
|
RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
|
|
|
|
|
RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
|
|
|
|
|
/* R */
|
|
|
|
|
RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
|
|
|
|
|
RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
|
|
|
|
|
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20),
|
|
|
|
|
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 24),
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
static const union vin_data vin2_data_mux = {
|
|
|
|
|
.data24 = {
|
|
|
|
|
/* B */
|
|
|
|
|
VI2_DATA0_VI2_B0_MARK, VI2_DATA1_VI2_B1_MARK,
|
|
|
|
|
VI2_DATA2_VI2_B2_MARK, VI2_DATA3_VI2_B3_MARK,
|
|
|
|
|
VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK,
|
|
|
|
|
VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI2_G0_MARK, VI2_G1_MARK,
|
|
|
|
|
VI2_G2_MARK, VI2_G3_MARK,
|
|
|
|
|
VI2_G4_MARK, VI2_G5_MARK,
|
|
|
|
|
VI2_G6_MARK, VI2_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI2_R0_MARK, VI2_R1_MARK,
|
|
|
|
|
VI2_R2_MARK, VI2_R3_MARK,
|
|
|
|
|
VI2_R4_MARK, VI2_R5_MARK,
|
|
|
|
|
VI2_R6_MARK, VI2_R7_MARK,
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_data18_pins[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
|
|
|
|
|
RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13),
|
|
|
|
|
RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
|
|
|
|
|
/* G */
|
|
|
|
|
RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10),
|
|
|
|
|
RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
|
|
|
|
|
RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
|
|
|
|
|
/* R */
|
|
|
|
|
RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15),
|
|
|
|
|
RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20),
|
|
|
|
|
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 24),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_data18_mux[] = {
|
|
|
|
|
/* B */
|
|
|
|
|
VI2_DATA2_VI2_B2_MARK, VI2_DATA3_VI2_B3_MARK,
|
|
|
|
|
VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK,
|
|
|
|
|
VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK,
|
|
|
|
|
/* G */
|
|
|
|
|
VI2_G2_MARK, VI2_G3_MARK,
|
|
|
|
|
VI2_G4_MARK, VI2_G5_MARK,
|
|
|
|
|
VI2_G6_MARK, VI2_G7_MARK,
|
|
|
|
|
/* R */
|
|
|
|
|
VI2_R2_MARK, VI2_R3_MARK,
|
|
|
|
|
VI2_R4_MARK, VI2_R5_MARK,
|
|
|
|
|
VI2_R6_MARK, VI2_R7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_sync_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 16), /* HSYNC */
|
|
|
|
|
RCAR_GP_PIN(1, 21), /* VSYNC */
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_sync_mux[] = {
|
|
|
|
|
VI2_HSYNC_N_MARK,
|
|
|
|
|
VI2_VSYNC_N_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_field_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 9),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_field_mux[] = {
|
|
|
|
|
VI2_FIELD_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_clkenb_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 8),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_clkenb_mux[] = {
|
|
|
|
|
VI2_CLKENB_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_clk_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 11),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin2_clk_mux[] = {
|
|
|
|
|
VI2_CLK_MARK,
|
|
|
|
|
};
|
|
|
|
|
/* - VIN3 ----------------------------------------------------------------- */
|
|
|
|
|
static const unsigned int vin3_data8_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
|
|
|
|
|
RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
|
|
|
|
|
RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
|
|
|
|
|
RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_data8_mux[] = {
|
|
|
|
|
VI3_DATA0_MARK, VI3_DATA1_MARK,
|
|
|
|
|
VI3_DATA2_MARK, VI3_DATA3_MARK,
|
|
|
|
|
VI3_DATA4_MARK, VI3_DATA5_MARK,
|
|
|
|
|
VI3_DATA6_MARK, VI3_DATA7_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_sync_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 16), /* HSYNC */
|
|
|
|
|
RCAR_GP_PIN(1, 17), /* VSYNC */
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_sync_mux[] = {
|
|
|
|
|
VI3_HSYNC_N_MARK,
|
|
|
|
|
VI2_VSYNC_N_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_field_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 15),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_field_mux[] = {
|
|
|
|
|
VI3_FIELD_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_clkenb_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 14),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_clkenb_mux[] = {
|
|
|
|
|
VI3_CLKENB_MARK,
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_clk_pins[] = {
|
|
|
|
|
RCAR_GP_PIN(1, 23),
|
|
|
|
|
};
|
|
|
|
|
static const unsigned int vin3_clk_mux[] = {
|
|
|
|
|
VI3_CLK_MARK,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clk_a),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clk_b),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clk_c),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout_b),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout_c),
|
|
|
|
|
SH_PFC_PIN_GROUP(audio_clkout_d),
|
|
|
|
|
SH_PFC_PIN_GROUP(du_rgb666),
|
|
|
|
|
SH_PFC_PIN_GROUP(du_rgb888),
|
|
|
|
|
SH_PFC_PIN_GROUP(du_clk_out_0),
|
|
|
|
@ -3259,6 +3758,32 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|
|
|
|
SH_PFC_PIN_GROUP(sdhi3_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(sdhi3_cd),
|
|
|
|
|
SH_PFC_PIN_GROUP(sdhi3_wp),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi0_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi0129_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi1_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi1_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi2_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi2_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi3_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi34_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi4_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi4_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi5),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi5_b),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi5_c),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi6),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi6_b),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi7_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi7_b_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi7_c_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi78_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi78_b_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi78_c_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi8_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi8_b_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi8_c_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi9_data),
|
|
|
|
|
SH_PFC_PIN_GROUP(ssi9_ctrl),
|
|
|
|
|
SH_PFC_PIN_GROUP(tpu0_to0),
|
|
|
|
|
SH_PFC_PIN_GROUP(tpu0_to1),
|
|
|
|
|
SH_PFC_PIN_GROUP(tpu0_to2),
|
|
|
|
@ -3266,16 +3791,54 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|
|
|
|
SH_PFC_PIN_GROUP(usb0),
|
|
|
|
|
SH_PFC_PIN_GROUP(usb1),
|
|
|
|
|
SH_PFC_PIN_GROUP(usb2),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_data_g),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_data_r),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_data_b),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_hsync_signal),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_vsync_signal),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_field_signal),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_data_enable),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 24),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 20),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_data18),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 16),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 12),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 10),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 8),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 4),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_sync),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_field),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_clkenb),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin0_clk),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_data),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 24),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 20),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_data18),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 16),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 12),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 10),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 8),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin1_data, 4),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_sync),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_field),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_clkenb),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin1_clk),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin2_data, 24),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin2_data18),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin2_data, 16),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin2_data, 8),
|
|
|
|
|
VIN_DATA_PIN_GROUP(vin2_data, 4),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin2_sync),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin2_field),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin2_clkenb),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin2_clk),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin3_data8),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin3_sync),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin3_field),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin3_clkenb),
|
|
|
|
|
SH_PFC_PIN_GROUP(vin3_clk),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const audio_clk_groups[] = {
|
|
|
|
|
"audio_clk_a",
|
|
|
|
|
"audio_clk_b",
|
|
|
|
|
"audio_clk_c",
|
|
|
|
|
"audio_clkout",
|
|
|
|
|
"audio_clkout_b",
|
|
|
|
|
"audio_clkout_c",
|
|
|
|
|
"audio_clkout_d",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const du_groups[] = {
|
|
|
|
@ -3533,6 +4096,35 @@ static const char * const sdhi3_groups[] = {
|
|
|
|
|
"sdhi3_wp",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const ssi_groups[] = {
|
|
|
|
|
"ssi0_data",
|
|
|
|
|
"ssi0129_ctrl",
|
|
|
|
|
"ssi1_data",
|
|
|
|
|
"ssi1_ctrl",
|
|
|
|
|
"ssi2_data",
|
|
|
|
|
"ssi2_ctrl",
|
|
|
|
|
"ssi3_data",
|
|
|
|
|
"ssi34_ctrl",
|
|
|
|
|
"ssi4_data",
|
|
|
|
|
"ssi4_ctrl",
|
|
|
|
|
"ssi5",
|
|
|
|
|
"ssi5_b",
|
|
|
|
|
"ssi5_c",
|
|
|
|
|
"ssi6",
|
|
|
|
|
"ssi6_b",
|
|
|
|
|
"ssi7_data",
|
|
|
|
|
"ssi7_b_data",
|
|
|
|
|
"ssi7_c_data",
|
|
|
|
|
"ssi78_ctrl",
|
|
|
|
|
"ssi78_b_ctrl",
|
|
|
|
|
"ssi78_c_ctrl",
|
|
|
|
|
"ssi8_data",
|
|
|
|
|
"ssi8_b_data",
|
|
|
|
|
"ssi8_c_data",
|
|
|
|
|
"ssi9_data",
|
|
|
|
|
"ssi9_ctrl",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const tpu0_groups[] = {
|
|
|
|
|
"tpu0_to0",
|
|
|
|
|
"tpu0_to1",
|
|
|
|
@ -3553,22 +4145,57 @@ static const char * const usb2_groups[] = {
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const vin0_groups[] = {
|
|
|
|
|
"vin0_data_g",
|
|
|
|
|
"vin0_data_r",
|
|
|
|
|
"vin0_data_b",
|
|
|
|
|
"vin0_hsync_signal",
|
|
|
|
|
"vin0_vsync_signal",
|
|
|
|
|
"vin0_field_signal",
|
|
|
|
|
"vin0_data_enable",
|
|
|
|
|
"vin0_data24",
|
|
|
|
|
"vin0_data20",
|
|
|
|
|
"vin0_data18",
|
|
|
|
|
"vin0_data16",
|
|
|
|
|
"vin0_data12",
|
|
|
|
|
"vin0_data10",
|
|
|
|
|
"vin0_data8",
|
|
|
|
|
"vin0_data4",
|
|
|
|
|
"vin0_sync",
|
|
|
|
|
"vin0_field",
|
|
|
|
|
"vin0_clkenb",
|
|
|
|
|
"vin0_clk",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const vin1_groups[] = {
|
|
|
|
|
"vin1_data",
|
|
|
|
|
"vin1_data24",
|
|
|
|
|
"vin1_data20",
|
|
|
|
|
"vin1_data18",
|
|
|
|
|
"vin1_data16",
|
|
|
|
|
"vin1_data12",
|
|
|
|
|
"vin1_data10",
|
|
|
|
|
"vin1_data8",
|
|
|
|
|
"vin1_data4",
|
|
|
|
|
"vin1_sync",
|
|
|
|
|
"vin1_field",
|
|
|
|
|
"vin1_clkenb",
|
|
|
|
|
"vin1_clk",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const vin2_groups[] = {
|
|
|
|
|
"vin2_data24",
|
|
|
|
|
"vin2_data18",
|
|
|
|
|
"vin2_data16",
|
|
|
|
|
"vin2_data8",
|
|
|
|
|
"vin2_data4",
|
|
|
|
|
"vin2_sync",
|
|
|
|
|
"vin2_field",
|
|
|
|
|
"vin2_clkenb",
|
|
|
|
|
"vin2_clk",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char * const vin3_groups[] = {
|
|
|
|
|
"vin3_data8",
|
|
|
|
|
"vin3_sync",
|
|
|
|
|
"vin3_field",
|
|
|
|
|
"vin3_clkenb",
|
|
|
|
|
"vin3_clk",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const struct sh_pfc_function pinmux_functions[] = {
|
|
|
|
|
SH_PFC_FUNCTION(audio_clk),
|
|
|
|
|
SH_PFC_FUNCTION(du),
|
|
|
|
|
SH_PFC_FUNCTION(du0),
|
|
|
|
|
SH_PFC_FUNCTION(du1),
|
|
|
|
@ -3599,12 +4226,15 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|
|
|
|
SH_PFC_FUNCTION(sdhi1),
|
|
|
|
|
SH_PFC_FUNCTION(sdhi2),
|
|
|
|
|
SH_PFC_FUNCTION(sdhi3),
|
|
|
|
|
SH_PFC_FUNCTION(ssi),
|
|
|
|
|
SH_PFC_FUNCTION(tpu0),
|
|
|
|
|
SH_PFC_FUNCTION(usb0),
|
|
|
|
|
SH_PFC_FUNCTION(usb1),
|
|
|
|
|
SH_PFC_FUNCTION(usb2),
|
|
|
|
|
SH_PFC_FUNCTION(vin0),
|
|
|
|
|
SH_PFC_FUNCTION(vin1),
|
|
|
|
|
SH_PFC_FUNCTION(vin2),
|
|
|
|
|
SH_PFC_FUNCTION(vin3),
|
|
|
|
|
};
|
|
|
|
|
|
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static struct pinmux_cfg_reg pinmux_config_regs[] = {
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