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iwlwifi: memory allocation optimization
This patch optimizes memory allocation. The cmd member of iwl_tx_queue was allocated previously as a continuous block of memory. This patch allocates separate memory chunks for each command and maps/unmaps these chunks in the run time. Signed-off-by: Gregory Greenman <gregory.greenman@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -939,8 +939,8 @@ static void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
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len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
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if (txq_id != IWL_CMD_QUEUE_NUM) {
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sta = txq->cmd[txq->q.write_ptr].cmd.tx.sta_id;
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sec_ctl = txq->cmd[txq->q.write_ptr].cmd.tx.sec_ctl;
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sta = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id;
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sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl;
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switch (sec_ctl & TX_CMD_SEC_MSK) {
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case TX_CMD_SEC_CCM:
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@ -979,7 +979,7 @@ static void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
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u8 sta = 0;
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if (txq_id != IWL_CMD_QUEUE_NUM)
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sta = txq->cmd[txq->q.read_ptr].cmd.tx.sta_id;
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sta = txq->cmd[txq->q.read_ptr]->cmd.tx.sta_id;
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shared_data->queues_byte_cnt_tbls[txq_id].tfd_offset[txq->q.read_ptr].
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val = cpu_to_le16(1 | (sta << 12));
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@ -135,8 +135,7 @@ struct iwl_tx_info {
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struct iwl_tx_queue {
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struct iwl_queue q;
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struct iwl_tfd_frame *bd;
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struct iwl_cmd *cmd;
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dma_addr_t dma_addr_cmd;
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struct iwl_cmd *cmd[TFD_TX_CMD_SLOTS];
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struct iwl_tx_info *txb;
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int need_update;
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int sched_retry;
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@ -228,7 +228,7 @@ cancel:
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* TX cmd queue. Otherwise in case the cmd comes
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* in later, it will possibly set an invalid
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* address (cmd->meta.source). */
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qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
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qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
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qcmd->meta.flags &= ~CMD_WANT_SKB;
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}
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fail:
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@ -208,11 +208,12 @@ EXPORT_SYMBOL(iwl_txq_update_write_ptr);
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* Free all buffers.
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* 0-fill, but do not free "txq" descriptor structure.
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*/
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static void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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static void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
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{
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struct iwl_tx_queue *txq = &priv->txq[txq_id];
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struct iwl_queue *q = &txq->q;
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struct pci_dev *dev = priv->pci_dev;
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int len;
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int i, slots_num, len;
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if (q->n_bd == 0)
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return;
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@ -227,7 +228,12 @@ static void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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len += IWL_MAX_SCAN_SIZE;
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/* De-alloc array of command/tx buffers */
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pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
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slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
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TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
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for (i = 0; i < slots_num; i++)
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kfree(txq->cmd[i]);
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if (txq_id == IWL_CMD_QUEUE_NUM)
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kfree(txq->cmd[slots_num]);
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/* De-alloc circular buffer of TFDs */
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if (txq->q.n_bd)
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@ -400,8 +406,7 @@ static int iwl_tx_queue_init(struct iwl_priv *priv,
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struct iwl_tx_queue *txq,
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int slots_num, u32 txq_id)
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{
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struct pci_dev *dev = priv->pci_dev;
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int len;
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int i, len;
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int rc = 0;
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/*
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@ -412,17 +417,25 @@ static int iwl_tx_queue_init(struct iwl_priv *priv,
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* For normal Tx queues (all other queues), no super-size command
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* space is needed.
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*/
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len = sizeof(struct iwl_cmd) * slots_num;
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if (txq_id == IWL_CMD_QUEUE_NUM)
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len += IWL_MAX_SCAN_SIZE;
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txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
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if (!txq->cmd)
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return -ENOMEM;
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len = sizeof(struct iwl_cmd);
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for (i = 0; i <= slots_num; i++) {
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if (i == slots_num) {
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if (txq_id == IWL_CMD_QUEUE_NUM)
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len += IWL_MAX_SCAN_SIZE;
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else
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continue;
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}
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txq->cmd[i] = kmalloc(len, GFP_KERNEL | GFP_DMA);
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if (!txq->cmd[i])
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return -ENOMEM;
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}
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/* Alloc driver data array and TFD circular buffer */
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rc = iwl_tx_queue_alloc(priv, txq, txq_id);
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if (rc) {
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pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
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for (i = 0; i < slots_num; i++)
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kfree(txq->cmd[i]);
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return -ENOMEM;
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}
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@ -451,7 +464,7 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
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/* Tx queues */
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for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
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iwl_tx_queue_free(priv, &priv->txq[txq_id]);
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iwl_tx_queue_free(priv, txq_id);
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/* Keep-warm buffer */
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iwl_kw_free(priv);
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@ -859,7 +872,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
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txq->txb[q->write_ptr].skb[0] = skb;
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/* Set up first empty entry in queue's array of Tx/cmd buffers */
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out_cmd = &txq->cmd[idx];
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out_cmd = txq->cmd[idx];
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tx_cmd = &out_cmd->cmd.tx;
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memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
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memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));
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@ -899,8 +912,9 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
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/* Physical address of this Tx command's header (not MAC header!),
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* within command buffer array. */
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txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
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offsetof(struct iwl_cmd, hdr);
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txcmd_phys = pci_map_single(priv->pci_dev, out_cmd,
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sizeof(struct iwl_cmd), PCI_DMA_TODEVICE);
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txcmd_phys += offsetof(struct iwl_cmd, hdr);
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/* Add buffer containing Tx command and MAC(!) header to TFD's
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* first entry */
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@ -1004,7 +1018,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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u32 idx;
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u16 fix_size;
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dma_addr_t phys_addr;
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int ret;
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int len, ret;
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unsigned long flags;
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cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
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@ -1034,7 +1048,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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control_flags = (u32 *) tfd;
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idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
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out_cmd = &txq->cmd[idx];
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out_cmd = txq->cmd[idx];
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out_cmd->hdr.cmd = cmd->id;
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memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
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@ -1048,9 +1062,11 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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INDEX_TO_SEQ(q->write_ptr));
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if (out_cmd->meta.flags & CMD_SIZE_HUGE)
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out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
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phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
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offsetof(struct iwl_cmd, hdr);
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len = (idx == TFD_CMD_SLOTS) ?
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IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
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phys_addr = pci_map_single(priv->pci_dev, out_cmd, len,
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PCI_DMA_TODEVICE);
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phys_addr += offsetof(struct iwl_cmd, hdr);
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iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
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IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
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@ -1115,6 +1131,9 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
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{
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struct iwl_tx_queue *txq = &priv->txq[txq_id];
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struct iwl_queue *q = &txq->q;
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struct iwl_tfd_frame *bd = &txq->bd[index];
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dma_addr_t dma_addr;
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int is_odd, buf_len;
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int nfreed = 0;
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if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
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@ -1132,6 +1151,19 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
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q->write_ptr, q->read_ptr);
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queue_work(priv->workqueue, &priv->restart);
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}
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is_odd = (index/2) & 0x1;
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if (is_odd) {
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dma_addr = IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
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(IWL_GET_BITS(bd->pa[index],
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tb2_addr_hi20) << 16);
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buf_len = IWL_GET_BITS(bd->pa[index], tb2_len);
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} else {
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dma_addr = le32_to_cpu(bd->pa[index].tb1_addr);
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buf_len = IWL_GET_BITS(bd->pa[index], tb1_len);
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}
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pci_unmap_single(priv->pci_dev, dma_addr, buf_len,
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PCI_DMA_TODEVICE);
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nfreed++;
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}
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}
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@ -1163,7 +1195,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
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BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
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cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
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cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
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cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
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/* Input error checking is done when commands are added to queue. */
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if (cmd->meta.flags & CMD_WANT_SKB) {
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