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soc: actions: sps: Add S900 power domains
Add power domains for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [AF: Update Kconfig help text] Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -10,7 +10,7 @@ config OWL_PM_DOMAINS
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select PM_GENERIC_DOMAINS
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help
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Say 'y' here to enable support for Smart Power System (SPS)
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power-gating on Actions Semiconductor S500 and S700 SoCs.
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power-gating on Actions Semiconductor S500, S700 and S900 SoCs.
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If unsure, say 'n'.
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endif
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@ -14,6 +14,7 @@
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#include <linux/soc/actions/owl-sps.h>
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#include <dt-bindings/power/owl-s500-powergate.h>
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#include <dt-bindings/power/owl-s700-powergate.h>
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#include <dt-bindings/power/owl-s900-powergate.h>
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struct owl_sps_domain_info {
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const char *name;
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@ -240,9 +241,66 @@ static const struct owl_sps_info s700_sps_info = {
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.domains = s700_sps_domains,
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};
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static const struct owl_sps_domain_info s900_sps_domains[] = {
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[S900_PD_GPU_B] = {
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.name = "GPU_B",
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.pwr_bit = 3,
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},
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[S900_PD_VCE] = {
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.name = "VCE",
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.pwr_bit = 4,
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},
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[S900_PD_SENSOR] = {
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.name = "SENSOR",
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.pwr_bit = 5,
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},
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[S900_PD_VDE] = {
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.name = "VDE",
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.pwr_bit = 6,
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},
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[S900_PD_HDE] = {
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.name = "HDE",
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.pwr_bit = 7,
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},
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[S900_PD_USB3] = {
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.name = "USB3",
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.pwr_bit = 8,
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},
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[S900_PD_DDR0] = {
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.name = "DDR0",
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.pwr_bit = 9,
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},
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[S900_PD_DDR1] = {
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.name = "DDR1",
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.pwr_bit = 10,
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},
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[S900_PD_DE] = {
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.name = "DE",
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.pwr_bit = 13,
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},
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[S900_PD_NAND] = {
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.name = "NAND",
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.pwr_bit = 14,
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},
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[S900_PD_USB2_H0] = {
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.name = "USB2_H0",
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.pwr_bit = 15,
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},
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[S900_PD_USB2_H1] = {
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.name = "USB2_H1",
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.pwr_bit = 16,
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},
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};
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static const struct owl_sps_info s900_sps_info = {
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.num_domains = ARRAY_SIZE(s900_sps_domains),
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.domains = s900_sps_domains,
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};
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static const struct of_device_id owl_sps_of_matches[] = {
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{ .compatible = "actions,s500-sps", .data = &s500_sps_info },
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{ .compatible = "actions,s700-sps", .data = &s700_sps_info },
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{ .compatible = "actions,s900-sps", .data = &s900_sps_info },
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{ }
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};
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