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ARM: s3c24xx: Sort cpufreq tables
Some later changes in cpufreq core require these tables to be sorted based on ascending order of their frequencies. There was only one offender. Fix it and add comments over the arrays. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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@ -32,11 +32,12 @@
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#include <plat/cpu.h>
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#include <plat/cpu-freq-core.h>
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/* This array should be sorted in ascending order of the frequencies */
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static struct cpufreq_frequency_table pll_vals_12MHz[] = {
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{ .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), },
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{ .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), },
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{ .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
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{ .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), },
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{ .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
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{ .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), },
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{ .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), },
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{ .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), },
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@ -20,6 +20,7 @@
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#include <plat/cpu.h>
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#include <plat/cpu-freq-core.h>
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/* This array should be sorted in ascending order of the frequencies */
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static struct cpufreq_frequency_table s3c2440_plls_12[] = {
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{ .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
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{ .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */
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@ -20,6 +20,7 @@
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#include <plat/cpu.h>
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#include <plat/cpu-freq-core.h>
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/* This array should be sorted in ascending order of the frequencies */
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static struct cpufreq_frequency_table s3c2440_plls_169344[] = {
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{ .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
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{ .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */
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