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docs: networking: convert caif files to ReST
There are two text files for caif, plus one already converted file. Convert the two remaining ones to ReST, create a new index.rst file for CAIF, adding it to the main networking documentation index. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Mauro Carvalho Chehab
David S. Miller
parent
790ab249b5
commit
da50d57abd
@ -1,5 +1,3 @@
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:orphan:
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.. SPDX-License-Identifier: GPL-2.0
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.. include:: <isonum.txt>
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13
Documentation/networking/caif/index.rst
Normal file
13
Documentation/networking/caif/index.rst
Normal file
@ -0,0 +1,13 @@
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.. SPDX-License-Identifier: GPL-2.0
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CAIF
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====
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Contents:
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.. toctree::
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:maxdepth: 2
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linux_caif
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caif
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spi_porting
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@ -1,12 +1,19 @@
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.. SPDX-License-Identifier: GPL-2.0
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.. include:: <isonum.txt>
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==========
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Linux CAIF
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===========
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copyright (C) ST-Ericsson AB 2010
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Author: Sjur Brendeland/ sjur.brandeland@stericsson.com
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License terms: GNU General Public License (GPL) version 2
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==========
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Copyright |copy| ST-Ericsson AB 2010
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:Author: Sjur Brendeland/ sjur.brandeland@stericsson.com
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:License terms: GNU General Public License (GPL) version 2
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Introduction
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------------
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============
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CAIF is a MUX protocol used by ST-Ericsson cellular modems for
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communication between Modem and host. The host processes can open virtual AT
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channels, initiate GPRS Data connections, Video channels and Utility Channels.
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@ -16,13 +23,16 @@ ST-Ericsson modems support a number of transports between modem
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and host. Currently, UART and Loopback are available for Linux.
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Architecture:
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------------
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Architecture
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============
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The implementation of CAIF is divided into:
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* CAIF Socket Layer and GPRS IP Interface.
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* CAIF Core Protocol Implementation
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* CAIF Link Layer, implemented as NET devices.
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::
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RTNL
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!
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@ -46,12 +56,12 @@ The implementation of CAIF is divided into:
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I M P L E M E N T A T I O N
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===========================
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Implementation
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==============
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CAIF Core Protocol Layer
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=========================================
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------------------------
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CAIF Core layer implements the CAIF protocol as defined by ST-Ericsson.
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It implements the CAIF protocol stack in a layered approach, where
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@ -59,8 +69,11 @@ each layer described in the specification is implemented as a separate layer.
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The architecture is inspired by the design patterns "Protocol Layer" and
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"Protocol Packet".
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== CAIF structure ==
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CAIF structure
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^^^^^^^^^^^^^^
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The Core CAIF implementation contains:
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- Simple implementation of CAIF.
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- Layered architecture (a la Streams), each layer in the CAIF
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specification is implemented in a separate c-file.
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@ -73,7 +86,8 @@ The Core CAIF implementation contains:
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to the called function (except for framing layers' receive function)
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Layered Architecture
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--------------------
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====================
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The CAIF protocol can be divided into two parts: Support functions and Protocol
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Implementation. The support functions include:
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@ -112,7 +126,7 @@ The CAIF Protocol implementation contains:
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- CFSERL CAIF Serial layer. Handles concatenation/split of frames
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into CAIF Frames with correct length.
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::
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+---------+
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| Config |
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@ -143,18 +157,24 @@ The CAIF Protocol implementation contains:
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In this layered approach the following "rules" apply.
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- All layers embed the same structure "struct cflayer"
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- A layer does not depend on any other layer's private data.
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- Layers are stacked by setting the pointers
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- Layers are stacked by setting the pointers::
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layer->up , layer->dn
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- In order to send data upwards, each layer should do
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- In order to send data upwards, each layer should do::
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layer->up->receive(layer->up, packet);
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- In order to send data downwards, each layer should do
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- In order to send data downwards, each layer should do::
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layer->dn->transmit(layer->dn, packet);
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CAIF Socket and IP interface
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===========================
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============================
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The IP interface and CAIF socket API are implemented on top of the
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CAIF Core protocol. The IP Interface and CAIF socket have an instance of
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229
Documentation/networking/caif/spi_porting.rst
Normal file
229
Documentation/networking/caif/spi_porting.rst
Normal file
@ -0,0 +1,229 @@
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.. SPDX-License-Identifier: GPL-2.0
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================
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CAIF SPI porting
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================
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CAIF SPI basics
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===============
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Running CAIF over SPI needs some extra setup, owing to the nature of SPI.
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Two extra GPIOs have been added in order to negotiate the transfers
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between the master and the slave. The minimum requirement for running
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CAIF over SPI is a SPI slave chip and two GPIOs (more details below).
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Please note that running as a slave implies that you need to keep up
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with the master clock. An overrun or underrun event is fatal.
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CAIF SPI framework
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==================
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To make porting as easy as possible, the CAIF SPI has been divided in
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two parts. The first part (called the interface part) deals with all
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generic functionality such as length framing, SPI frame negotiation
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and SPI frame delivery and transmission. The other part is the CAIF
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SPI slave device part, which is the module that you have to write if
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you want to run SPI CAIF on a new hardware. This part takes care of
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the physical hardware, both with regard to SPI and to GPIOs.
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- Implementing a CAIF SPI device:
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- Functionality provided by the CAIF SPI slave device:
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In order to implement a SPI device you will, as a minimum,
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need to implement the following
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functions:
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::
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int (*init_xfer) (struct cfspi_xfer * xfer, struct cfspi_dev *dev):
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This function is called by the CAIF SPI interface to give
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you a chance to set up your hardware to be ready to receive
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a stream of data from the master. The xfer structure contains
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both physical and logical addresses, as well as the total length
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of the transfer in both directions.The dev parameter can be used
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to map to different CAIF SPI slave devices.
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::
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void (*sig_xfer) (bool xfer, struct cfspi_dev *dev):
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This function is called by the CAIF SPI interface when the output
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(SPI_INT) GPIO needs to change state. The boolean value of the xfer
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variable indicates whether the GPIO should be asserted (HIGH) or
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deasserted (LOW). The dev parameter can be used to map to different CAIF
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SPI slave devices.
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- Functionality provided by the CAIF SPI interface:
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::
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void (*ss_cb) (bool assert, struct cfspi_ifc *ifc);
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This function is called by the CAIF SPI slave device in order to
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signal a change of state of the input GPIO (SS) to the interface.
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Only active edges are mandatory to be reported.
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This function can be called from IRQ context (recommended in order
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not to introduce latency). The ifc parameter should be the pointer
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returned from the platform probe function in the SPI device structure.
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::
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void (*xfer_done_cb) (struct cfspi_ifc *ifc);
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This function is called by the CAIF SPI slave device in order to
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report that a transfer is completed. This function should only be
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called once both the transmission and the reception are completed.
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This function can be called from IRQ context (recommended in order
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not to introduce latency). The ifc parameter should be the pointer
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returned from the platform probe function in the SPI device structure.
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- Connecting the bits and pieces:
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- Filling in the SPI slave device structure:
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Connect the necessary callback functions.
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Indicate clock speed (used to calculate toggle delays).
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Chose a suitable name (helps debugging if you use several CAIF
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SPI slave devices).
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Assign your private data (can be used to map to your
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structure).
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- Filling in the SPI slave platform device structure:
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Add name of driver to connect to ("cfspi_sspi").
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Assign the SPI slave device structure as platform data.
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Padding
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=======
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In order to optimize throughput, a number of SPI padding options are provided.
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Padding can be enabled independently for uplink and downlink transfers.
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Padding can be enabled for the head, the tail and for the total frame size.
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The padding needs to be correctly configured on both sides of the link.
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The padding can be changed via module parameters in cfspi_sspi.c or via
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the sysfs directory of the cfspi_sspi driver (before device registration).
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- CAIF SPI device template::
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/*
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* Copyright (C) ST-Ericsson AB 2010
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* Author: Daniel Martensson / Daniel.Martensson@stericsson.com
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* License terms: GNU General Public License (GPL), version 2.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/wait.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <net/caif/caif_spi.h>
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MODULE_LICENSE("GPL");
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struct sspi_struct {
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struct cfspi_dev sdev;
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struct cfspi_xfer *xfer;
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};
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static struct sspi_struct slave;
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static struct platform_device slave_device;
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static irqreturn_t sspi_irq(int irq, void *arg)
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{
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/* You only need to trigger on an edge to the active state of the
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* SS signal. Once a edge is detected, the ss_cb() function should be
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* called with the parameter assert set to true. It is OK
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* (and even advised) to call the ss_cb() function in IRQ context in
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* order not to add any delay. */
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return IRQ_HANDLED;
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}
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static void sspi_complete(void *context)
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{
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/* Normally the DMA or the SPI framework will call you back
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* in something similar to this. The only thing you need to
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* do is to call the xfer_done_cb() function, providing the pointer
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* to the CAIF SPI interface. It is OK to call this function
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* from IRQ context. */
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}
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static int sspi_init_xfer(struct cfspi_xfer *xfer, struct cfspi_dev *dev)
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{
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/* Store transfer info. For a normal implementation you should
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* set up your DMA here and make sure that you are ready to
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* receive the data from the master SPI. */
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struct sspi_struct *sspi = (struct sspi_struct *)dev->priv;
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sspi->xfer = xfer;
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return 0;
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}
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void sspi_sig_xfer(bool xfer, struct cfspi_dev *dev)
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{
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/* If xfer is true then you should assert the SPI_INT to indicate to
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* the master that you are ready to receive the data from the master
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* SPI. If xfer is false then you should de-assert SPI_INT to indicate
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* that the transfer is done.
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*/
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struct sspi_struct *sspi = (struct sspi_struct *)dev->priv;
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}
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static void sspi_release(struct device *dev)
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{
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/*
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* Here you should release your SPI device resources.
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*/
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}
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static int __init sspi_init(void)
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{
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/* Here you should initialize your SPI device by providing the
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* necessary functions, clock speed, name and private data. Once
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* done, you can register your device with the
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* platform_device_register() function. This function will return
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* with the CAIF SPI interface initialized. This is probably also
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* the place where you should set up your GPIOs, interrupts and SPI
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* resources. */
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int res = 0;
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/* Initialize slave device. */
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slave.sdev.init_xfer = sspi_init_xfer;
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slave.sdev.sig_xfer = sspi_sig_xfer;
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slave.sdev.clk_mhz = 13;
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slave.sdev.priv = &slave;
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slave.sdev.name = "spi_sspi";
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slave_device.dev.release = sspi_release;
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/* Initialize platform device. */
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slave_device.name = "cfspi_sspi";
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slave_device.dev.platform_data = &slave.sdev;
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/* Register platform device. */
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res = platform_device_register(&slave_device);
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if (res) {
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printk(KERN_WARNING "sspi_init: failed to register dev.\n");
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return -ENODEV;
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}
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return res;
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}
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static void __exit sspi_exit(void)
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{
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platform_device_del(&slave_device);
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}
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module_init(sspi_init);
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module_exit(sspi_exit);
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@ -1,208 +0,0 @@
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- CAIF SPI porting -
|
||||
|
||||
- CAIF SPI basics:
|
||||
|
||||
Running CAIF over SPI needs some extra setup, owing to the nature of SPI.
|
||||
Two extra GPIOs have been added in order to negotiate the transfers
|
||||
between the master and the slave. The minimum requirement for running
|
||||
CAIF over SPI is a SPI slave chip and two GPIOs (more details below).
|
||||
Please note that running as a slave implies that you need to keep up
|
||||
with the master clock. An overrun or underrun event is fatal.
|
||||
|
||||
- CAIF SPI framework:
|
||||
|
||||
To make porting as easy as possible, the CAIF SPI has been divided in
|
||||
two parts. The first part (called the interface part) deals with all
|
||||
generic functionality such as length framing, SPI frame negotiation
|
||||
and SPI frame delivery and transmission. The other part is the CAIF
|
||||
SPI slave device part, which is the module that you have to write if
|
||||
you want to run SPI CAIF on a new hardware. This part takes care of
|
||||
the physical hardware, both with regard to SPI and to GPIOs.
|
||||
|
||||
- Implementing a CAIF SPI device:
|
||||
|
||||
- Functionality provided by the CAIF SPI slave device:
|
||||
|
||||
In order to implement a SPI device you will, as a minimum,
|
||||
need to implement the following
|
||||
functions:
|
||||
|
||||
int (*init_xfer) (struct cfspi_xfer * xfer, struct cfspi_dev *dev):
|
||||
|
||||
This function is called by the CAIF SPI interface to give
|
||||
you a chance to set up your hardware to be ready to receive
|
||||
a stream of data from the master. The xfer structure contains
|
||||
both physical and logical addresses, as well as the total length
|
||||
of the transfer in both directions.The dev parameter can be used
|
||||
to map to different CAIF SPI slave devices.
|
||||
|
||||
void (*sig_xfer) (bool xfer, struct cfspi_dev *dev):
|
||||
|
||||
This function is called by the CAIF SPI interface when the output
|
||||
(SPI_INT) GPIO needs to change state. The boolean value of the xfer
|
||||
variable indicates whether the GPIO should be asserted (HIGH) or
|
||||
deasserted (LOW). The dev parameter can be used to map to different CAIF
|
||||
SPI slave devices.
|
||||
|
||||
- Functionality provided by the CAIF SPI interface:
|
||||
|
||||
void (*ss_cb) (bool assert, struct cfspi_ifc *ifc);
|
||||
|
||||
This function is called by the CAIF SPI slave device in order to
|
||||
signal a change of state of the input GPIO (SS) to the interface.
|
||||
Only active edges are mandatory to be reported.
|
||||
This function can be called from IRQ context (recommended in order
|
||||
not to introduce latency). The ifc parameter should be the pointer
|
||||
returned from the platform probe function in the SPI device structure.
|
||||
|
||||
void (*xfer_done_cb) (struct cfspi_ifc *ifc);
|
||||
|
||||
This function is called by the CAIF SPI slave device in order to
|
||||
report that a transfer is completed. This function should only be
|
||||
called once both the transmission and the reception are completed.
|
||||
This function can be called from IRQ context (recommended in order
|
||||
not to introduce latency). The ifc parameter should be the pointer
|
||||
returned from the platform probe function in the SPI device structure.
|
||||
|
||||
- Connecting the bits and pieces:
|
||||
|
||||
- Filling in the SPI slave device structure:
|
||||
|
||||
Connect the necessary callback functions.
|
||||
Indicate clock speed (used to calculate toggle delays).
|
||||
Chose a suitable name (helps debugging if you use several CAIF
|
||||
SPI slave devices).
|
||||
Assign your private data (can be used to map to your structure).
|
||||
|
||||
- Filling in the SPI slave platform device structure:
|
||||
Add name of driver to connect to ("cfspi_sspi").
|
||||
Assign the SPI slave device structure as platform data.
|
||||
|
||||
- Padding:
|
||||
|
||||
In order to optimize throughput, a number of SPI padding options are provided.
|
||||
Padding can be enabled independently for uplink and downlink transfers.
|
||||
Padding can be enabled for the head, the tail and for the total frame size.
|
||||
The padding needs to be correctly configured on both sides of the link.
|
||||
The padding can be changed via module parameters in cfspi_sspi.c or via
|
||||
the sysfs directory of the cfspi_sspi driver (before device registration).
|
||||
|
||||
- CAIF SPI device template:
|
||||
|
||||
/*
|
||||
* Copyright (C) ST-Ericsson AB 2010
|
||||
* Author: Daniel Martensson / Daniel.Martensson@stericsson.com
|
||||
* License terms: GNU General Public License (GPL), version 2.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <net/caif/caif_spi.h>
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
struct sspi_struct {
|
||||
struct cfspi_dev sdev;
|
||||
struct cfspi_xfer *xfer;
|
||||
};
|
||||
|
||||
static struct sspi_struct slave;
|
||||
static struct platform_device slave_device;
|
||||
|
||||
static irqreturn_t sspi_irq(int irq, void *arg)
|
||||
{
|
||||
/* You only need to trigger on an edge to the active state of the
|
||||
* SS signal. Once a edge is detected, the ss_cb() function should be
|
||||
* called with the parameter assert set to true. It is OK
|
||||
* (and even advised) to call the ss_cb() function in IRQ context in
|
||||
* order not to add any delay. */
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void sspi_complete(void *context)
|
||||
{
|
||||
/* Normally the DMA or the SPI framework will call you back
|
||||
* in something similar to this. The only thing you need to
|
||||
* do is to call the xfer_done_cb() function, providing the pointer
|
||||
* to the CAIF SPI interface. It is OK to call this function
|
||||
* from IRQ context. */
|
||||
}
|
||||
|
||||
static int sspi_init_xfer(struct cfspi_xfer *xfer, struct cfspi_dev *dev)
|
||||
{
|
||||
/* Store transfer info. For a normal implementation you should
|
||||
* set up your DMA here and make sure that you are ready to
|
||||
* receive the data from the master SPI. */
|
||||
|
||||
struct sspi_struct *sspi = (struct sspi_struct *)dev->priv;
|
||||
|
||||
sspi->xfer = xfer;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void sspi_sig_xfer(bool xfer, struct cfspi_dev *dev)
|
||||
{
|
||||
/* If xfer is true then you should assert the SPI_INT to indicate to
|
||||
* the master that you are ready to receive the data from the master
|
||||
* SPI. If xfer is false then you should de-assert SPI_INT to indicate
|
||||
* that the transfer is done.
|
||||
*/
|
||||
|
||||
struct sspi_struct *sspi = (struct sspi_struct *)dev->priv;
|
||||
}
|
||||
|
||||
static void sspi_release(struct device *dev)
|
||||
{
|
||||
/*
|
||||
* Here you should release your SPI device resources.
|
||||
*/
|
||||
}
|
||||
|
||||
static int __init sspi_init(void)
|
||||
{
|
||||
/* Here you should initialize your SPI device by providing the
|
||||
* necessary functions, clock speed, name and private data. Once
|
||||
* done, you can register your device with the
|
||||
* platform_device_register() function. This function will return
|
||||
* with the CAIF SPI interface initialized. This is probably also
|
||||
* the place where you should set up your GPIOs, interrupts and SPI
|
||||
* resources. */
|
||||
|
||||
int res = 0;
|
||||
|
||||
/* Initialize slave device. */
|
||||
slave.sdev.init_xfer = sspi_init_xfer;
|
||||
slave.sdev.sig_xfer = sspi_sig_xfer;
|
||||
slave.sdev.clk_mhz = 13;
|
||||
slave.sdev.priv = &slave;
|
||||
slave.sdev.name = "spi_sspi";
|
||||
slave_device.dev.release = sspi_release;
|
||||
|
||||
/* Initialize platform device. */
|
||||
slave_device.name = "cfspi_sspi";
|
||||
slave_device.dev.platform_data = &slave.sdev;
|
||||
|
||||
/* Register platform device. */
|
||||
res = platform_device_register(&slave_device);
|
||||
if (res) {
|
||||
printk(KERN_WARNING "sspi_init: failed to register dev.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static void __exit sspi_exit(void)
|
||||
{
|
||||
platform_device_del(&slave_device);
|
||||
}
|
||||
|
||||
module_init(sspi_init);
|
||||
module_exit(sspi_exit);
|
||||
@ -15,6 +15,7 @@ Contents:
|
||||
device_drivers/index
|
||||
dsa/index
|
||||
devlink/index
|
||||
caif/index
|
||||
ethtool-netlink
|
||||
ieee802154
|
||||
j1939
|
||||
|
||||
@ -28,7 +28,7 @@ config CAIF_SPI_SLAVE
|
||||
The CAIF Link layer SPI Protocol driver for Slave SPI interface.
|
||||
This driver implements a platform driver to accommodate for a
|
||||
platform specific SPI device. A sample CAIF SPI Platform device is
|
||||
provided in <file:Documentation/networking/caif/spi_porting.txt>.
|
||||
provided in <file:Documentation/networking/caif/spi_porting.rst>.
|
||||
|
||||
config CAIF_SPI_SYNC
|
||||
bool "Next command and length in start of frame"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user