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[ALSA] hda-intel - Add NVidia support
Modules: HDA Intel driver This patch is to make the Intel HDA code work for NVIDIA azalia controller. Modified by Takashi Iwai <tiwai@suse.de> Signed-off-by: Vinod G. <vinodg@nvidia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -223,6 +223,9 @@ enum {
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#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
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#define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
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/* Defines for Nvidia HDA support */
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#define NVIDIA_HDA_TRANSREG_ADDR 0x4e
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#define NVIDIA_HDA_ENABLE_COHBITS 0x0f
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/*
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* Use CORB/RIRB for communication from/to codecs.
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@ -328,6 +331,7 @@ enum {
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AZX_DRIVER_VIA,
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AZX_DRIVER_SIS,
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AZX_DRIVER_ULI,
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AZX_DRIVER_NVIDIA,
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};
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static char *driver_short_names[] __devinitdata = {
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@ -335,7 +339,8 @@ static char *driver_short_names[] __devinitdata = {
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[AZX_DRIVER_ATI] = "HDA ATI SB",
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[AZX_DRIVER_VIA] = "HDA VIA VT82xx",
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[AZX_DRIVER_SIS] = "HDA SIS966",
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[AZX_DRIVER_ULI] = "HDA ULI M5461"
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[AZX_DRIVER_ULI] = "HDA ULI M5461",
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[AZX_DRIVER_NVIDIA] = "HDA NVidia",
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};
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/*
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@ -710,14 +715,14 @@ static void azx_stream_stop(azx_t *chip, azx_dev_t *azx_dev)
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*/
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static void azx_init_chip(azx_t *chip)
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{
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unsigned char tcsel_reg, ati_misc_cntl2;
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unsigned char reg;
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/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
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* TCSEL == Traffic Class Select Register, which sets PCI express QOS
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* Ensuring these bits are 0 clears playback static on some HD Audio codecs
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*/
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pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, &tcsel_reg);
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pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, tcsel_reg & 0xf8);
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pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, ®);
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pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, reg & 0xf8);
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/* reset controller */
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azx_reset(chip);
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@ -733,13 +738,21 @@ static void azx_init_chip(azx_t *chip)
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azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
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azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
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/* For ATI SB450 azalia HD audio, we need to enable snoop */
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if (chip->driver_type == AZX_DRIVER_ATI) {
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switch (chip->driver_type) {
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case AZX_DRIVER_ATI:
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/* For ATI SB450 azalia HD audio, we need to enable snoop */
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pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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&ati_misc_cntl2);
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®);
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pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
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(ati_misc_cntl2 & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP);
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}
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(reg & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP);
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break;
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case AZX_DRIVER_NVIDIA:
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/* For NVIDIA HDA, enable snoop */
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pci_read_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR, ®);
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pci_write_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR,
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(reg & 0xf0) | NVIDIA_HDA_ENABLE_COHBITS);
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break;
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}
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}
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@ -1601,6 +1614,8 @@ static struct pci_device_id azx_ids[] = {
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{ 0x1106, 0x3288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_VIA }, /* VIA VT8251/VT8237A */
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{ 0x1039, 0x7502, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_SIS }, /* SIS966 */
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{ 0x10b9, 0x5461, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ULI }, /* ULI M5461 */
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{ 0x10de, 0x026c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA 026c */
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{ 0x10de, 0x0371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA 0371 */
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, azx_ids);
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