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iio: frequency: admv1013: add support for ADMV1013
The ADMV1013 is a wideband, microwave upconverter optimized for point to point microwave radio designs operating in the 24 GHz to 44 GHz radio frequency (RF) range. Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADMV1013.pdf Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://lore.kernel.org/r/20211221112206.97066-1-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Antoniu Miclaus
Jonathan Cameron
parent
1bb866dcb8
commit
da35a7b526
@ -50,6 +50,16 @@ config ADF4371
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To compile this driver as a module, choose M here: the
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module will be called adf4371.
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config ADMV1013
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tristate "Analog Devices ADMV1013 Microwave Upconverter"
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depends on SPI && COMMON_CLK
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help
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Say yes here to build support for Analog Devices ADMV1013
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24 GHz to 44 GHz, Wideband, Microwave Upconverter.
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To compile this driver as a module, choose M here: the
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module will be called admv1013.
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config ADRF6780
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tristate "Analog Devices ADRF6780 Microwave Upconverter"
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depends on SPI
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@ -7,4 +7,5 @@
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obj-$(CONFIG_AD9523) += ad9523.o
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obj-$(CONFIG_ADF4350) += adf4350.o
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obj-$(CONFIG_ADF4371) += adf4371.o
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obj-$(CONFIG_ADMV1013) += admv1013.o
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obj-$(CONFIG_ADRF6780) += adrf6780.o
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656
drivers/iio/frequency/admv1013.c
Normal file
656
drivers/iio/frequency/admv1013.c
Normal file
@ -0,0 +1,656 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ADMV1013 driver
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*
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* Copyright 2021 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/notifier.h>
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#include <linux/property.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/units.h>
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#include <asm/unaligned.h>
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/* ADMV1013 Register Map */
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#define ADMV1013_REG_SPI_CONTROL 0x00
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#define ADMV1013_REG_ALARM 0x01
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#define ADMV1013_REG_ALARM_MASKS 0x02
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#define ADMV1013_REG_ENABLE 0x03
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#define ADMV1013_REG_LO_AMP_I 0x05
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#define ADMV1013_REG_LO_AMP_Q 0x06
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#define ADMV1013_REG_OFFSET_ADJUST_I 0x07
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#define ADMV1013_REG_OFFSET_ADJUST_Q 0x08
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#define ADMV1013_REG_QUAD 0x09
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#define ADMV1013_REG_VVA_TEMP_COMP 0x0A
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/* ADMV1013_REG_SPI_CONTROL Map */
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#define ADMV1013_PARITY_EN_MSK BIT(15)
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#define ADMV1013_SPI_SOFT_RESET_MSK BIT(14)
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#define ADMV1013_CHIP_ID_MSK GENMASK(11, 4)
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#define ADMV1013_CHIP_ID 0xA
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#define ADMV1013_REVISION_ID_MSK GENMASK(3, 0)
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/* ADMV1013_REG_ALARM Map */
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#define ADMV1013_PARITY_ERROR_MSK BIT(15)
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#define ADMV1013_TOO_FEW_ERRORS_MSK BIT(14)
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#define ADMV1013_TOO_MANY_ERRORS_MSK BIT(13)
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#define ADMV1013_ADDRESS_RANGE_ERROR_MSK BIT(12)
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/* ADMV1013_REG_ENABLE Map */
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#define ADMV1013_VGA_PD_MSK BIT(15)
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#define ADMV1013_MIXER_PD_MSK BIT(14)
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#define ADMV1013_QUAD_PD_MSK GENMASK(13, 11)
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#define ADMV1013_BG_PD_MSK BIT(10)
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#define ADMV1013_MIXER_IF_EN_MSK BIT(7)
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#define ADMV1013_DET_EN_MSK BIT(5)
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/* ADMV1013_REG_LO_AMP Map */
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#define ADMV1013_LOAMP_PH_ADJ_FINE_MSK GENMASK(13, 7)
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#define ADMV1013_MIXER_VGATE_MSK GENMASK(6, 0)
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/* ADMV1013_REG_OFFSET_ADJUST Map */
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#define ADMV1013_MIXER_OFF_ADJ_P_MSK GENMASK(15, 9)
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#define ADMV1013_MIXER_OFF_ADJ_N_MSK GENMASK(8, 2)
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/* ADMV1013_REG_QUAD Map */
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#define ADMV1013_QUAD_SE_MODE_MSK GENMASK(9, 6)
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#define ADMV1013_QUAD_FILTERS_MSK GENMASK(3, 0)
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/* ADMV1013_REG_VVA_TEMP_COMP Map */
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#define ADMV1013_VVA_TEMP_COMP_MSK GENMASK(15, 0)
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/* ADMV1013 Miscellaneous Defines */
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#define ADMV1013_READ BIT(7)
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#define ADMV1013_REG_ADDR_READ_MSK GENMASK(6, 1)
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#define ADMV1013_REG_ADDR_WRITE_MSK GENMASK(22, 17)
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#define ADMV1013_REG_DATA_MSK GENMASK(16, 1)
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enum {
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ADMV1013_IQ_MODE,
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ADMV1013_IF_MODE
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};
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enum {
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ADMV1013_RFMOD_I_CALIBPHASE,
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ADMV1013_RFMOD_Q_CALIBPHASE,
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};
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enum {
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ADMV1013_SE_MODE_POS = 6,
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ADMV1013_SE_MODE_NEG = 9,
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ADMV1013_SE_MODE_DIFF = 12
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};
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struct admv1013_state {
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struct spi_device *spi;
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struct clk *clkin;
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/* Protect against concurrent accesses to the device and to data */
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struct mutex lock;
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struct regulator *reg;
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struct notifier_block nb;
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unsigned int input_mode;
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unsigned int quad_se_mode;
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bool det_en;
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u8 data[3] ____cacheline_aligned;
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};
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static int __admv1013_spi_read(struct admv1013_state *st, unsigned int reg,
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unsigned int *val)
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{
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int ret;
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struct spi_transfer t = {0};
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st->data[0] = ADMV1013_READ | FIELD_PREP(ADMV1013_REG_ADDR_READ_MSK, reg);
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st->data[1] = 0x0;
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st->data[2] = 0x0;
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t.rx_buf = &st->data[0];
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t.tx_buf = &st->data[0];
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t.len = 3;
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ret = spi_sync_transfer(st->spi, &t, 1);
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if (ret)
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return ret;
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*val = FIELD_GET(ADMV1013_REG_DATA_MSK, get_unaligned_be24(&st->data[0]));
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return ret;
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}
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static int admv1013_spi_read(struct admv1013_state *st, unsigned int reg,
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unsigned int *val)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv1013_spi_read(st, reg, val);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int __admv1013_spi_write(struct admv1013_state *st,
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unsigned int reg,
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unsigned int val)
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{
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put_unaligned_be24(FIELD_PREP(ADMV1013_REG_DATA_MSK, val) |
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FIELD_PREP(ADMV1013_REG_ADDR_WRITE_MSK, reg), &st->data[0]);
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return spi_write(st->spi, &st->data[0], 3);
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}
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static int admv1013_spi_write(struct admv1013_state *st, unsigned int reg,
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unsigned int val)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv1013_spi_write(st, reg, val);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int __admv1013_spi_update_bits(struct admv1013_state *st, unsigned int reg,
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unsigned int mask, unsigned int val)
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{
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int ret;
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unsigned int data, temp;
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ret = __admv1013_spi_read(st, reg, &data);
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if (ret)
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return ret;
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temp = (data & ~mask) | (val & mask);
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return __admv1013_spi_write(st, reg, temp);
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}
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static int admv1013_spi_update_bits(struct admv1013_state *st, unsigned int reg,
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unsigned int mask, unsigned int val)
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{
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int ret;
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mutex_lock(&st->lock);
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ret = __admv1013_spi_update_bits(st, reg, mask, val);
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mutex_unlock(&st->lock);
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return ret;
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}
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static int admv1013_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct admv1013_state *st = iio_priv(indio_dev);
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unsigned int data, addr;
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int ret;
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switch (info) {
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case IIO_CHAN_INFO_CALIBBIAS:
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switch (chan->channel) {
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case IIO_MOD_I:
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addr = ADMV1013_REG_OFFSET_ADJUST_I;
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break;
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case IIO_MOD_Q:
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addr = ADMV1013_REG_OFFSET_ADJUST_Q;
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break;
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default:
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return -EINVAL;
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}
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ret = admv1013_spi_read(st, addr, &data);
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if (ret)
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return ret;
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if (!chan->channel)
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*val = FIELD_GET(ADMV1013_MIXER_OFF_ADJ_P_MSK, data);
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else
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*val = FIELD_GET(ADMV1013_MIXER_OFF_ADJ_N_MSK, data);
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int admv1013_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long info)
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{
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struct admv1013_state *st = iio_priv(indio_dev);
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unsigned int addr, data, msk;
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switch (info) {
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case IIO_CHAN_INFO_CALIBBIAS:
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switch (chan->channel2) {
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case IIO_MOD_I:
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addr = ADMV1013_REG_OFFSET_ADJUST_I;
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break;
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case IIO_MOD_Q:
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addr = ADMV1013_REG_OFFSET_ADJUST_Q;
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break;
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default:
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return -EINVAL;
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}
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if (!chan->channel) {
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msk = ADMV1013_MIXER_OFF_ADJ_P_MSK;
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data = FIELD_PREP(ADMV1013_MIXER_OFF_ADJ_P_MSK, val);
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} else {
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msk = ADMV1013_MIXER_OFF_ADJ_N_MSK;
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data = FIELD_PREP(ADMV1013_MIXER_OFF_ADJ_N_MSK, val);
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}
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return admv1013_spi_update_bits(st, addr, msk, data);
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default:
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return -EINVAL;
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}
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}
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static ssize_t admv1013_read(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct admv1013_state *st = iio_priv(indio_dev);
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unsigned int data, addr;
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int ret;
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switch ((u32)private) {
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case ADMV1013_RFMOD_I_CALIBPHASE:
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addr = ADMV1013_REG_LO_AMP_I;
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break;
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case ADMV1013_RFMOD_Q_CALIBPHASE:
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addr = ADMV1013_REG_LO_AMP_Q;
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break;
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default:
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return -EINVAL;
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}
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ret = admv1013_spi_read(st, addr, &data);
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if (ret)
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return ret;
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data = FIELD_GET(ADMV1013_LOAMP_PH_ADJ_FINE_MSK, data);
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return sysfs_emit(buf, "%u\n", data);
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}
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static ssize_t admv1013_write(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct admv1013_state *st = iio_priv(indio_dev);
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unsigned int data;
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int ret;
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ret = kstrtou32(buf, 10, &data);
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if (ret)
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return ret;
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data = FIELD_PREP(ADMV1013_LOAMP_PH_ADJ_FINE_MSK, data);
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switch ((u32)private) {
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case ADMV1013_RFMOD_I_CALIBPHASE:
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ret = admv1013_spi_update_bits(st, ADMV1013_REG_LO_AMP_I,
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ADMV1013_LOAMP_PH_ADJ_FINE_MSK,
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data);
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if (ret)
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return ret;
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break;
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case ADMV1013_RFMOD_Q_CALIBPHASE:
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ret = admv1013_spi_update_bits(st, ADMV1013_REG_LO_AMP_Q,
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ADMV1013_LOAMP_PH_ADJ_FINE_MSK,
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data);
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if (ret)
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return ret;
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break;
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default:
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return -EINVAL;
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}
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return ret ? ret : len;
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}
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static int admv1013_update_quad_filters(struct admv1013_state *st)
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{
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unsigned int filt_raw;
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u64 rate = clk_get_rate(st->clkin);
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if (rate >= (5400 * HZ_PER_MHZ) && rate <= (7000 * HZ_PER_MHZ))
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filt_raw = 15;
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else if (rate >= (5400 * HZ_PER_MHZ) && rate <= (8000 * HZ_PER_MHZ))
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filt_raw = 10;
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else if (rate >= (6600 * HZ_PER_MHZ) && rate <= (9200 * HZ_PER_MHZ))
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filt_raw = 5;
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else
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filt_raw = 0;
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return __admv1013_spi_update_bits(st, ADMV1013_REG_QUAD,
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ADMV1013_QUAD_FILTERS_MSK,
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FIELD_PREP(ADMV1013_QUAD_FILTERS_MSK, filt_raw));
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}
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static int admv1013_update_mixer_vgate(struct admv1013_state *st)
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{
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unsigned int vcm, mixer_vgate;
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vcm = regulator_get_voltage(st->reg);
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if (vcm >= 0 && vcm < 1800000)
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mixer_vgate = (2389 * vcm / 1000000 + 8100) / 100;
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else if (vcm > 1800000 && vcm < 2600000)
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mixer_vgate = (2375 * vcm / 1000000 + 125) / 100;
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else
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return -EINVAL;
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return __admv1013_spi_update_bits(st, ADMV1013_REG_LO_AMP_I,
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ADMV1013_MIXER_VGATE_MSK,
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FIELD_PREP(ADMV1013_MIXER_VGATE_MSK, mixer_vgate));
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}
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static int admv1013_reg_access(struct iio_dev *indio_dev,
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unsigned int reg,
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unsigned int write_val,
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unsigned int *read_val)
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{
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struct admv1013_state *st = iio_priv(indio_dev);
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if (read_val)
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return admv1013_spi_read(st, reg, read_val);
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else
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return admv1013_spi_write(st, reg, write_val);
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}
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static const struct iio_info admv1013_info = {
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.read_raw = admv1013_read_raw,
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.write_raw = admv1013_write_raw,
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.debugfs_reg_access = &admv1013_reg_access,
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};
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static int admv1013_freq_change(struct notifier_block *nb, unsigned long action, void *data)
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{
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struct admv1013_state *st = container_of(nb, struct admv1013_state, nb);
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int ret;
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if (action == POST_RATE_CHANGE) {
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mutex_lock(&st->lock);
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ret = notifier_from_errno(admv1013_update_quad_filters(st));
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mutex_unlock(&st->lock);
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return ret;
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}
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return NOTIFY_OK;
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}
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#define _ADMV1013_EXT_INFO(_name, _shared, _ident) { \
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.name = _name, \
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.read = admv1013_read, \
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.write = admv1013_write, \
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.private = _ident, \
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.shared = _shared, \
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}
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static const struct iio_chan_spec_ext_info admv1013_ext_info[] = {
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_ADMV1013_EXT_INFO("i_calibphase", IIO_SEPARATE, ADMV1013_RFMOD_I_CALIBPHASE),
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_ADMV1013_EXT_INFO("q_calibphase", IIO_SEPARATE, ADMV1013_RFMOD_Q_CALIBPHASE),
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{ },
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};
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#define ADMV1013_CHAN_PHASE(_channel, _channel2, _admv1013_ext_info) { \
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.type = IIO_ALTVOLTAGE, \
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.output = 0, \
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.indexed = 1, \
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||||
.channel2 = _channel2, \
|
||||
.channel = _channel, \
|
||||
.differential = 1, \
|
||||
.ext_info = _admv1013_ext_info, \
|
||||
}
|
||||
|
||||
#define ADMV1013_CHAN_CALIB(_channel, rf_comp) { \
|
||||
.type = IIO_ALTVOLTAGE, \
|
||||
.output = 0, \
|
||||
.indexed = 1, \
|
||||
.channel = _channel, \
|
||||
.channel2 = IIO_MOD_##rf_comp, \
|
||||
.info_mask_separate = BIT(IIO_CHAN_INFO_CALIBBIAS), \
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec admv1013_channels[] = {
|
||||
ADMV1013_CHAN_PHASE(0, 1, admv1013_ext_info),
|
||||
ADMV1013_CHAN_CALIB(0, I),
|
||||
ADMV1013_CHAN_CALIB(0, Q),
|
||||
ADMV1013_CHAN_CALIB(1, I),
|
||||
ADMV1013_CHAN_CALIB(1, Q),
|
||||
};
|
||||
|
||||
static int admv1013_init(struct admv1013_state *st)
|
||||
{
|
||||
int ret;
|
||||
unsigned int data;
|
||||
struct spi_device *spi = st->spi;
|
||||
|
||||
/* Perform a software reset */
|
||||
ret = __admv1013_spi_update_bits(st, ADMV1013_REG_SPI_CONTROL,
|
||||
ADMV1013_SPI_SOFT_RESET_MSK,
|
||||
FIELD_PREP(ADMV1013_SPI_SOFT_RESET_MSK, 1));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = __admv1013_spi_update_bits(st, ADMV1013_REG_SPI_CONTROL,
|
||||
ADMV1013_SPI_SOFT_RESET_MSK,
|
||||
FIELD_PREP(ADMV1013_SPI_SOFT_RESET_MSK, 0));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = __admv1013_spi_read(st, ADMV1013_REG_SPI_CONTROL, &data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
data = FIELD_GET(ADMV1013_CHIP_ID_MSK, data);
|
||||
if (data != ADMV1013_CHIP_ID) {
|
||||
dev_err(&spi->dev, "Invalid Chip ID.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = __admv1013_spi_write(st, ADMV1013_REG_VVA_TEMP_COMP, 0xE700);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
data = FIELD_PREP(ADMV1013_QUAD_SE_MODE_MSK, st->quad_se_mode);
|
||||
|
||||
ret = __admv1013_spi_update_bits(st, ADMV1013_REG_QUAD,
|
||||
ADMV1013_QUAD_SE_MODE_MSK, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = admv1013_update_mixer_vgate(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = admv1013_update_quad_filters(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return __admv1013_spi_update_bits(st, ADMV1013_REG_ENABLE,
|
||||
ADMV1013_DET_EN_MSK |
|
||||
ADMV1013_MIXER_IF_EN_MSK,
|
||||
st->det_en |
|
||||
st->input_mode);
|
||||
}
|
||||
|
||||
static void admv1013_clk_disable(void *data)
|
||||
{
|
||||
clk_disable_unprepare(data);
|
||||
}
|
||||
|
||||
static void admv1013_reg_disable(void *data)
|
||||
{
|
||||
regulator_disable(data);
|
||||
}
|
||||
|
||||
static void admv1013_powerdown(void *data)
|
||||
{
|
||||
unsigned int enable_reg, enable_reg_msk;
|
||||
|
||||
/* Disable all components in the Enable Register */
|
||||
enable_reg_msk = ADMV1013_VGA_PD_MSK |
|
||||
ADMV1013_MIXER_PD_MSK |
|
||||
ADMV1013_QUAD_PD_MSK |
|
||||
ADMV1013_BG_PD_MSK |
|
||||
ADMV1013_MIXER_IF_EN_MSK |
|
||||
ADMV1013_DET_EN_MSK;
|
||||
|
||||
enable_reg = FIELD_PREP(ADMV1013_VGA_PD_MSK, 1) |
|
||||
FIELD_PREP(ADMV1013_MIXER_PD_MSK, 1) |
|
||||
FIELD_PREP(ADMV1013_QUAD_PD_MSK, 7) |
|
||||
FIELD_PREP(ADMV1013_BG_PD_MSK, 1) |
|
||||
FIELD_PREP(ADMV1013_MIXER_IF_EN_MSK, 0) |
|
||||
FIELD_PREP(ADMV1013_DET_EN_MSK, 0);
|
||||
|
||||
admv1013_spi_update_bits(data, ADMV1013_REG_ENABLE, enable_reg_msk, enable_reg);
|
||||
}
|
||||
|
||||
static int admv1013_properties_parse(struct admv1013_state *st)
|
||||
{
|
||||
int ret;
|
||||
const char *str;
|
||||
struct spi_device *spi = st->spi;
|
||||
|
||||
st->det_en = device_property_read_bool(&spi->dev, "adi,detector-enable");
|
||||
|
||||
ret = device_property_read_string(&spi->dev, "adi,input-mode", &str);
|
||||
if (ret)
|
||||
st->input_mode = ADMV1013_IQ_MODE;
|
||||
|
||||
if (!strcmp(str, "iq"))
|
||||
st->input_mode = ADMV1013_IQ_MODE;
|
||||
else if (!strcmp(str, "if"))
|
||||
st->input_mode = ADMV1013_IF_MODE;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
ret = device_property_read_string(&spi->dev, "adi,quad-se-mode", &str);
|
||||
if (ret)
|
||||
st->quad_se_mode = ADMV1013_SE_MODE_DIFF;
|
||||
|
||||
if (!strcmp(str, "diff"))
|
||||
st->quad_se_mode = ADMV1013_SE_MODE_DIFF;
|
||||
else if (!strcmp(str, "se-pos"))
|
||||
st->quad_se_mode = ADMV1013_SE_MODE_POS;
|
||||
else if (!strcmp(str, "se-neg"))
|
||||
st->quad_se_mode = ADMV1013_SE_MODE_NEG;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
st->reg = devm_regulator_get(&spi->dev, "vcm");
|
||||
if (IS_ERR(st->reg))
|
||||
return dev_err_probe(&spi->dev, PTR_ERR(st->reg),
|
||||
"failed to get the common-mode voltage\n");
|
||||
|
||||
st->clkin = devm_clk_get(&spi->dev, "lo_in");
|
||||
if (IS_ERR(st->clkin))
|
||||
return dev_err_probe(&spi->dev, PTR_ERR(st->clkin),
|
||||
"failed to get the LO input clock\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int admv1013_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct admv1013_state *st;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
|
||||
indio_dev->info = &admv1013_info;
|
||||
indio_dev->name = "admv1013";
|
||||
indio_dev->channels = admv1013_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(admv1013_channels);
|
||||
|
||||
st->spi = spi;
|
||||
|
||||
ret = admv1013_properties_parse(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = regulator_enable(st->reg);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "Failed to enable specified Common-Mode Voltage!\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_add_action_or_reset(&spi->dev, admv1013_reg_disable,
|
||||
st->reg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare_enable(st->clkin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_add_action_or_reset(&spi->dev, admv1013_clk_disable, st->clkin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
st->nb.notifier_call = admv1013_freq_change;
|
||||
ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
mutex_init(&st->lock);
|
||||
|
||||
ret = admv1013_init(st);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "admv1013 init failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_add_action_or_reset(&spi->dev, admv1013_powerdown, st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return devm_iio_device_register(&spi->dev, indio_dev);
|
||||
}
|
||||
|
||||
static const struct spi_device_id admv1013_id[] = {
|
||||
{ "admv1013", 0},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, admv1013_id);
|
||||
|
||||
static const struct of_device_id admv1013_of_match[] = {
|
||||
{ .compatible = "adi,admv1013" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, admv1013_of_match);
|
||||
|
||||
static struct spi_driver admv1013_driver = {
|
||||
.driver = {
|
||||
.name = "admv1013",
|
||||
.of_match_table = admv1013_of_match,
|
||||
},
|
||||
.probe = admv1013_probe,
|
||||
.id_table = admv1013_id,
|
||||
};
|
||||
module_spi_driver(admv1013_driver);
|
||||
|
||||
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com");
|
||||
MODULE_DESCRIPTION("Analog Devices ADMV1013");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user