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Reset controller changes for v4.8, part 2
- add Amlogic Meson SoC Reset Controller driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJXXrvZAAoJEFDCiBxwnmDrWD4P/RXrSSCbOdWFZ/+z36kFb1PO pCMxaKPjQqy4YWKzKskknMxCApF1Wk+yxgYGk1BwemYqTl4zWdrwkU4UhZi2UMJN dGtnKl6WMQXhkvvQFxXp0guev4J72qDeWhj+FTmjJ+mvVcpgQ1RyIyUj5Bk7l+gX rCu34qonFa9ZLXwYF9xwPOopDKmzjZQE3RZ1J9Qzgm2XOGpseyDIA3Ur9oxPk37q vLbD/NIqcPLKfxa1eGCLZ2ysLMx4NogiDAQmcw/yglnSzjFlw2cRcrgtYTCx3Slf CjOkexVmHF+hIjJAXX8EOtnO983/7WdpZHOHZzkTNUB7cO/SCQIHN9FL7WQhcsWT MjFaHYonfrchySheJTw20Swh6vGlJmfq/MqYCkS6zF71cqhHMK2AEtpNgEOU9g9S wGWrkt1Rt0Q49NqfzTFTgtnXHHcbeFhbUX0zlgrKL5Gn5MyC0l8oZXhnC92kT15F tlEpF/9uVq/zaN2IM4TKFvpHVKV1uHXj5bWjaPfSDVUmTdnTdMql1+ZC88Q17FU7 cqTP+YRJ4hpyJLQavbl/KLtMyBnQodKwcZkf+fK8afIsteoxv7OSVNZMwfC9pvDs IcogwfZSgApyq53/qIQOi6N2WYqYdX/Oe6zfqGLCdmnieMHYyEaiwLKLmlaoid1p s/xXaU3CmkLF/Pbx3+hE =Ft3q -----END PGP SIGNATURE----- Merge tag 'reset-for-4.8-2' of git://git.pengutronix.de/git/pza/linux into next/drivers Reset controller changes for v4.8, part 2 - add Amlogic Meson SoC Reset Controller driver * tag 'reset-for-4.8-2' of git://git.pengutronix.de/git/pza/linux: dt-bindings: reset: Add bindings for the Meson SoC Reset Controller reset: Add support for the Amlogic Meson SoC Reset Controller Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
d8d8126f22
@ -0,0 +1,18 @@
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Amlogic Meson SoC Reset Controller
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=======================================
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Please also refer to reset.txt in this directory for common reset
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controller binding usage.
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Required properties:
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- compatible: Should be "amlogic,meson8b-reset" or "amlogic,meson-gxbb-reset"
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- reg: should contain the register address base
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- #reset-cells: 1, see below
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example:
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reset: reset-controller {
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compatible = "amlogic,meson-gxbb-reset";
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reg = <0x0 0x04404 0x0 0x20>;
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#reset-cells = <1>;
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};
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@ -3,6 +3,7 @@ obj-$(CONFIG_ARCH_LPC18XX) += reset-lpc18xx.o
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obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
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obj-$(CONFIG_MACH_PISTACHIO) += reset-pistachio.o
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obj-$(CONFIG_ARCH_MESON) += reset-meson.o
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obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_ARCH_STI) += sti/
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obj-$(CONFIG_ARCH_HISI) += hisilicon/
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136
drivers/reset/reset-meson.c
Normal file
136
drivers/reset/reset-meson.c
Normal file
@ -0,0 +1,136 @@
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called COPYING.
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*
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* BSD LICENSE
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||||
*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#define REG_COUNT 8
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#define BITS_PER_REG 32
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struct meson_reset {
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void __iomem *reg_base;
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struct reset_controller_dev rcdev;
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};
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static int meson_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct meson_reset *data =
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container_of(rcdev, struct meson_reset, rcdev);
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unsigned int bank = id / BITS_PER_REG;
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unsigned int offset = id % BITS_PER_REG;
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void __iomem *reg_addr = data->reg_base + (bank << 2);
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if (bank >= REG_COUNT)
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return -EINVAL;
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writel(BIT(offset), reg_addr);
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return 0;
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}
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static const struct reset_control_ops meson_reset_ops = {
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.reset = meson_reset_reset,
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};
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static const struct of_device_id meson_reset_dt_ids[] = {
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{ .compatible = "amlogic,meson8b-reset", },
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{ .compatible = "amlogic,meson-gxbb-reset", },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);
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static int meson_reset_probe(struct platform_device *pdev)
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{
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struct meson_reset *data;
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struct resource *res;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->reg_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->reg_base))
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return PTR_ERR(data->reg_base);
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platform_set_drvdata(pdev, data);
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
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data->rcdev.ops = &meson_reset_ops;
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data->rcdev.of_node = pdev->dev.of_node;
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return devm_reset_controller_register(&pdev->dev, &data->rcdev);
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}
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static struct platform_driver meson_reset_driver = {
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.probe = meson_reset_probe,
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.driver = {
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.name = "meson_reset",
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.of_match_table = meson_reset_dt_ids,
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},
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};
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module_platform_driver(meson_reset_driver);
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MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
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MODULE_DESCRIPTION("Amlogic Meson Reset Controller driver");
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MODULE_LICENSE("Dual BSD/GPL");
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210
include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
Normal file
210
include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
Normal file
@ -0,0 +1,210 @@
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
|
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called COPYING.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright (c) 2016 BayLibre, SAS.
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
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#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
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/* RESET0 */
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#define RESET_HIU 0
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/* 1 */
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#define RESET_DOS_RESET 2
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#define RESET_DDR_TOP 3
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#define RESET_DCU_RESET 4
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#define RESET_VIU 5
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#define RESET_AIU 6
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#define RESET_VID_PLL_DIV 7
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/* 8 */
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#define RESET_PMUX 9
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#define RESET_VENC 10
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#define RESET_ASSIST 11
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#define RESET_AFIFO2 12
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#define RESET_VCBUS 13
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/* 14 */
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/* 15 */
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#define RESET_GIC 16
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#define RESET_CAPB3_DECODE 17
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#define RESET_NAND_CAPB3 18
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#define RESET_HDMITX_CAPB3 19
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#define RESET_MALI_CAPB3 20
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#define RESET_DOS_CAPB3 21
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#define RESET_SYS_CPU_CAPB3 22
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#define RESET_CBUS_CAPB3 23
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#define RESET_AHB_CNTL 24
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#define RESET_AHB_DATA 25
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#define RESET_VCBUS_CLK81 26
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#define RESET_MMC 27
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#define RESET_MIPI_0 28
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#define RESET_MIPI_1 29
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#define RESET_MIPI_2 30
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#define RESET_MIPI_3 31
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/* RESET1 */
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#define RESET_CPPM 32
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#define RESET_DEMUX 33
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#define RESET_USB_OTG 34
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#define RESET_DDR 35
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#define RESET_AO_RESET 36
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#define RESET_BT656 37
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#define RESET_AHB_SRAM 38
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/* 39 */
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#define RESET_PARSER 40
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#define RESET_BLKMV 41
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#define RESET_ISA 42
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#define RESET_ETHERNET 43
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#define RESET_SD_EMMC_A 44
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#define RESET_SD_EMMC_B 45
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#define RESET_SD_EMMC_C 46
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#define RESET_ROM_BOOT 47
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#define RESET_SYS_CPU_0 48
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#define RESET_SYS_CPU_1 49
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#define RESET_SYS_CPU_2 50
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#define RESET_SYS_CPU_3 51
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#define RESET_SYS_CPU_CORE_0 52
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#define RESET_SYS_CPU_CORE_1 53
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#define RESET_SYS_CPU_CORE_2 54
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#define RESET_SYS_CPU_CORE_3 55
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#define RESET_SYS_PLL_DIV 56
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#define RESET_SYS_CPU_AXI 57
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#define RESET_SYS_CPU_L2 58
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#define RESET_SYS_CPU_P 59
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#define RESET_SYS_CPU_MBIST 60
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/* 61 */
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/* 62 */
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/* 63 */
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/* RESET2 */
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#define RESET_VD_RMEM 64
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#define RESET_AUDIN 65
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#define RESET_HDMI_TX 66
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/* 67 */
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/* 68 */
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/* 69 */
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#define RESET_GE2D 70
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#define RESET_PARSER_REG 71
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#define RESET_PARSER_FETCH 72
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#define RESET_PARSER_CTL 73
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#define RESET_PARSER_TOP 74
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/* 75 */
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/* 76 */
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#define RESET_AO_CPU_RESET 77
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#define RESET_MALI 78
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#define RESET_HDMI_SYSTEM_RESET 79
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/* 80-95 */
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/* RESET3 */
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#define RESET_RING_OSCILLATOR 96
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#define RESET_SYS_CPU 97
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#define RESET_EFUSE 98
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#define RESET_SYS_CPU_BVCI 99
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#define RESET_AIFIFO 100
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#define RESET_TVFE 101
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#define RESET_AHB_BRIDGE_CNTL 102
|
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/* 103 */
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#define RESET_AUDIO_DAC 104
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#define RESET_DEMUX_TOP 105
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#define RESET_DEMUX_DES 106
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#define RESET_DEMUX_S2P_0 107
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#define RESET_DEMUX_S2P_1 108
|
||||
#define RESET_DEMUX_RESET_0 109
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#define RESET_DEMUX_RESET_1 110
|
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#define RESET_DEMUX_RESET_2 111
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/* 112-127 */
|
||||
/* RESET4 */
|
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/* 128 */
|
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/* 129 */
|
||||
/* 130 */
|
||||
/* 131 */
|
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#define RESET_DVIN_RESET 132
|
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#define RESET_RDMA 133
|
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#define RESET_VENCI 134
|
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#define RESET_VENCP 135
|
||||
/* 136 */
|
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#define RESET_VDAC 137
|
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#define RESET_RTC 138
|
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/* 139 */
|
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#define RESET_VDI6 140
|
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#define RESET_VENCL 141
|
||||
#define RESET_I2C_MASTER_2 142
|
||||
#define RESET_I2C_MASTER_1 143
|
||||
/* 144-159 */
|
||||
/* RESET5 */
|
||||
/* 160-191 */
|
||||
/* RESET6 */
|
||||
#define RESET_PERIPHS_GENERAL 192
|
||||
#define RESET_PERIPHS_SPICC 193
|
||||
#define RESET_PERIPHS_SMART_CARD 194
|
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#define RESET_PERIPHS_SAR_ADC 195
|
||||
#define RESET_PERIPHS_I2C_MASTER_0 196
|
||||
#define RESET_SANA 197
|
||||
/* 198 */
|
||||
#define RESET_PERIPHS_STREAM_INTERFACE 199
|
||||
#define RESET_PERIPHS_SDIO 200
|
||||
#define RESET_PERIPHS_UART_0 201
|
||||
#define RESET_PERIPHS_UART_1_2 202
|
||||
#define RESET_PERIPHS_ASYNC_0 203
|
||||
#define RESET_PERIPHS_ASYNC_1 204
|
||||
#define RESET_PERIPHS_SPI_0 205
|
||||
#define RESET_PERIPHS_SDHC 206
|
||||
#define RESET_UART_SLIP 207
|
||||
/* 208-223 */
|
||||
/* RESET7 */
|
||||
#define RESET_USB_DDR_0 224
|
||||
#define RESET_USB_DDR_1 225
|
||||
#define RESET_USB_DDR_2 226
|
||||
#define RESET_USB_DDR_3 227
|
||||
/* 228 */
|
||||
#define RESET_DEVICE_MMC_ARB 229
|
||||
/* 230 */
|
||||
#define RESET_VID_LOCK 231
|
||||
#define RESET_A9_DMC_PIPEL 232
|
||||
/* 233-255 */
|
||||
|
||||
#endif
|
||||
175
include/dt-bindings/reset/amlogic,meson8b-reset.h
Normal file
175
include/dt-bindings/reset/amlogic,meson8b-reset.h
Normal file
@ -0,0 +1,175 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright (c) 2016 BayLibre, SAS.
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called COPYING.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright (c) 2016 BayLibre, SAS.
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H
|
||||
#define _DT_BINDINGS_AMLOGIC_MESON8B_RESET_H
|
||||
|
||||
/* RESET0 */
|
||||
#define RESET_HIU 0
|
||||
#define RESET_VLD 1
|
||||
#define RESET_IQIDCT 2
|
||||
#define RESET_MC 3
|
||||
/* 8 */
|
||||
#define RESET_VIU 5
|
||||
#define RESET_AIU 6
|
||||
#define RESET_MCPU 7
|
||||
#define RESET_CCPU 8
|
||||
#define RESET_PMUX 9
|
||||
#define RESET_VENC 10
|
||||
#define RESET_ASSIST 11
|
||||
#define RESET_AFIFO2 12
|
||||
#define RESET_MDEC 13
|
||||
#define RESET_VLD_PART 14
|
||||
#define RESET_VIFIFO 15
|
||||
/* 16-31 */
|
||||
/* RESET1 */
|
||||
/* 32 */
|
||||
#define RESET_DEMUX 33
|
||||
#define RESET_USB_OTG 34
|
||||
#define RESET_DDR 35
|
||||
#define RESET_VDAC_1 36
|
||||
#define RESET_BT656 37
|
||||
#define RESET_AHB_SRAM 38
|
||||
#define RESET_AHB_BRIDGE 39
|
||||
#define RESET_PARSER 40
|
||||
#define RESET_BLKMV 41
|
||||
#define RESET_ISA 42
|
||||
#define RESET_ETHERNET 43
|
||||
#define RESET_ABUF 44
|
||||
#define RESET_AHB_DATA 45
|
||||
#define RESET_AHB_CNTL 46
|
||||
#define RESET_ROM_BOOT 47
|
||||
/* 48-63 */
|
||||
/* RESET2 */
|
||||
#define RESET_VD_RMEM 64
|
||||
#define RESET_AUDIN 65
|
||||
#define RESET_DBLK 66
|
||||
#define RESET_PIC_DC 66
|
||||
#define RESET_PSC 66
|
||||
#define RESET_NAND 66
|
||||
#define RESET_GE2D 70
|
||||
#define RESET_PARSER_REG 71
|
||||
#define RESET_PARSER_FETCH 72
|
||||
#define RESET_PARSER_CTL 73
|
||||
#define RESET_PARSER_TOP 74
|
||||
#define RESET_HDMI_APB 75
|
||||
#define RESET_AUDIO_APB 76
|
||||
#define RESET_MEDIA_CPU 77
|
||||
#define RESET_MALI 78
|
||||
#define RESET_HDMI_SYSTEM_RESET 79
|
||||
/* 80-95 */
|
||||
/* RESET3 */
|
||||
#define RESET_RING_OSCILLATOR 96
|
||||
#define RESET_SYS_CPU_0 97
|
||||
#define RESET_EFUSE 98
|
||||
#define RESET_SYS_CPU_BVCI 99
|
||||
#define RESET_AIFIFO 100
|
||||
#define RESET_AUDIO_PLL_MODULATOR 101
|
||||
#define RESET_AHB_BRIDGE_CNTL 102
|
||||
#define RESET_SYS_CPU_1 103
|
||||
#define RESET_AUDIO_DAC 104
|
||||
#define RESET_DEMUX_TOP 105
|
||||
#define RESET_DEMUX_DES 106
|
||||
#define RESET_DEMUX_S2P_0 107
|
||||
#define RESET_DEMUX_S2P_1 108
|
||||
#define RESET_DEMUX_RESET_0 109
|
||||
#define RESET_DEMUX_RESET_1 110
|
||||
#define RESET_DEMUX_RESET_2 111
|
||||
/* 112-127 */
|
||||
/* RESET4 */
|
||||
#define RESET_PL310 128
|
||||
#define RESET_A5_APB 129
|
||||
#define RESET_A5_AXI 130
|
||||
#define RESET_A5 131
|
||||
#define RESET_DVIN 132
|
||||
#define RESET_RDMA 133
|
||||
#define RESET_VENCI 134
|
||||
#define RESET_VENCP 135
|
||||
#define RESET_VENCT 136
|
||||
#define RESET_VDAC_4 137
|
||||
#define RESET_RTC 138
|
||||
#define RESET_A5_DEBUG 139
|
||||
#define RESET_VDI6 140
|
||||
#define RESET_VENCL 141
|
||||
/* 142-159 */
|
||||
/* RESET5 */
|
||||
#define RESET_DDR_PLL 160
|
||||
#define RESET_MISC_PLL 161
|
||||
#define RESET_SYS_PLL 162
|
||||
#define RESET_HPLL_PLL 163
|
||||
#define RESET_AUDIO_PLL 164
|
||||
#define RESET_VID2_PLL 165
|
||||
/* 166-191 */
|
||||
/* RESET6 */
|
||||
#define RESET_PERIPHS_GENERAL 192
|
||||
#define RESET_PERIPHS_IR_REMOTE 193
|
||||
#define RESET_PERIPHS_SMART_CARD 194
|
||||
#define RESET_PERIPHS_SAR_ADC 195
|
||||
#define RESET_PERIPHS_I2C_MASTER_0 196
|
||||
#define RESET_PERIPHS_I2C_MASTER_1 197
|
||||
#define RESET_PERIPHS_I2C_SLAVE 198
|
||||
#define RESET_PERIPHS_STREAM_INTERFACE 199
|
||||
#define RESET_PERIPHS_SDIO 200
|
||||
#define RESET_PERIPHS_UART_0 201
|
||||
#define RESET_PERIPHS_UART_1 202
|
||||
#define RESET_PERIPHS_ASYNC_0 203
|
||||
#define RESET_PERIPHS_ASYNC_1 204
|
||||
#define RESET_PERIPHS_SPI_0 205
|
||||
#define RESET_PERIPHS_SPI_1 206
|
||||
#define RESET_PERIPHS_LED_PWM 207
|
||||
/* 208-223 */
|
||||
/* RESET7 */
|
||||
/* 224-255 */
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user