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powerpc/perf: Add platform specific check_attr_config
Add platform specific attr.config value checks. Patch includes checks for both power9 and power10. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210408074504.248211-2-maddy@linux.ibm.com
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@ -694,3 +694,45 @@ int isa207_get_alternatives(u64 event, u64 alt[], int size, unsigned int flags,
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return num_alt;
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}
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int isa3XX_check_attr_config(struct perf_event *ev)
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{
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u64 val, sample_mode;
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u64 event = ev->attr.config;
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val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
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sample_mode = val & 0x3;
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/*
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* MMCRA[61:62] is Random Sampling Mode (SM).
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* value of 0b11 is reserved.
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*/
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if (sample_mode == 0x3)
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return -EINVAL;
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/*
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* Check for all reserved value
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* Source: Performance Monitoring Unit User Guide
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*/
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switch (val) {
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case 0x5:
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case 0x9:
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case 0xD:
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case 0x19:
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case 0x1D:
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case 0x1A:
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case 0x1E:
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return -EINVAL;
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}
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/*
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* MMCRA[48:51]/[52:55]) Threshold Start/Stop
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* Events Selection.
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* 0b11110000/0b00001111 is reserved.
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*/
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val = (event >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK;
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if (((val & 0xF0) == 0xF0) || ((val & 0xF) == 0xF))
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return -EINVAL;
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return 0;
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}
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@ -280,4 +280,6 @@ void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,
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struct pt_regs *regs);
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void isa207_get_mem_weight(u64 *weight);
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int isa3XX_check_attr_config(struct perf_event *ev);
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#endif
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@ -106,6 +106,18 @@ static int power10_get_alternatives(u64 event, unsigned int flags, u64 alt[])
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return num_alt;
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}
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static int power10_check_attr_config(struct perf_event *ev)
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{
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u64 val;
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u64 event = ev->attr.config;
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val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
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if (val == 0x10 || isa3XX_check_attr_config(ev))
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return -EINVAL;
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return 0;
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}
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GENERIC_EVENT_ATTR(cpu-cycles, PM_RUN_CYC);
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GENERIC_EVENT_ATTR(instructions, PM_RUN_INST_CMPL);
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GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
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@ -559,6 +571,7 @@ static struct power_pmu power10_pmu = {
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.attr_groups = power10_pmu_attr_groups,
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.bhrb_nr = 32,
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.capabilities = PERF_PMU_CAP_EXTENDED_REGS,
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.check_attr_config = power10_check_attr_config,
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};
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int init_power10_pmu(void)
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@ -151,6 +151,18 @@ static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[])
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return num_alt;
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}
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static int power9_check_attr_config(struct perf_event *ev)
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{
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u64 val;
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u64 event = ev->attr.config;
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val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
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if (val == 0xC || isa3XX_check_attr_config(ev))
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return -EINVAL;
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return 0;
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}
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GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
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GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC);
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GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
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@ -437,6 +449,7 @@ static struct power_pmu power9_pmu = {
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.attr_groups = power9_pmu_attr_groups,
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.bhrb_nr = 32,
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.capabilities = PERF_PMU_CAP_EXTENDED_REGS,
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.check_attr_config = power9_check_attr_config,
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};
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int init_power9_pmu(void)
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