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powerpc/perf: Add platform specific check_attr_config

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Add platform specific attr.config value checks. Patch
includes checks for both power9 and power10.

Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210408074504.248211-2-maddy@linux.ibm.com
This commit is contained in:
Madhavan Srinivasan 2021-04-08 13:15:04 +05:30 committed by Michael Ellerman
parent a38cb41719
commit d8a1d6c589
4 changed files with 70 additions and 0 deletions
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42
arch/powerpc/perf/isa207-common.c
View File

@ -694,3 +694,45 @@ int isa207_get_alternatives(u64 event, u64 alt[], int size, unsigned int flags,
return num_alt;
}
int isa3XX_check_attr_config(struct perf_event *ev)
{
u64 val, sample_mode;
u64 event = ev->attr.config;
val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
sample_mode = val & 0x3;
/*
* MMCRA[61:62] is Random Sampling Mode (SM).
* value of 0b11 is reserved.
*/
if (sample_mode == 0x3)
return -EINVAL;
/*
* Check for all reserved value
* Source: Performance Monitoring Unit User Guide
*/
switch (val) {
case 0x5:
case 0x9:
case 0xD:
case 0x19:
case 0x1D:
case 0x1A:
case 0x1E:
return -EINVAL;
}
/*
* MMCRA[48:51]/[52:55]) Threshold Start/Stop
* Events Selection.
* 0b11110000/0b00001111 is reserved.
*/
val = (event >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK;
if (((val & 0xF0) == 0xF0) || ((val & 0xF) == 0xF))
return -EINVAL;
return 0;
}

2
arch/powerpc/perf/isa207-common.h
View File

@ -280,4 +280,6 @@ void isa207_get_mem_data_src(union perf_mem_data_src *dsrc, u32 flags,
struct pt_regs *regs);
void isa207_get_mem_weight(u64 *weight);
int isa3XX_check_attr_config(struct perf_event *ev);
#endif

13
arch/powerpc/perf/power10-pmu.c
View File

@ -106,6 +106,18 @@ static int power10_get_alternatives(u64 event, unsigned int flags, u64 alt[])
return num_alt;
}
static int power10_check_attr_config(struct perf_event *ev)
{
u64 val;
u64 event = ev->attr.config;
val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
if (val == 0x10 || isa3XX_check_attr_config(ev))
return -EINVAL;
return 0;
}
GENERIC_EVENT_ATTR(cpu-cycles, PM_RUN_CYC);
GENERIC_EVENT_ATTR(instructions, PM_RUN_INST_CMPL);
GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
@ -559,6 +571,7 @@ static struct power_pmu power10_pmu = {
.attr_groups = power10_pmu_attr_groups,
.bhrb_nr = 32,
.capabilities = PERF_PMU_CAP_EXTENDED_REGS,
.check_attr_config = power10_check_attr_config,
};
int init_power10_pmu(void)

13
arch/powerpc/perf/power9-pmu.c
View File

@ -151,6 +151,18 @@ static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[])
return num_alt;
}
static int power9_check_attr_config(struct perf_event *ev)
{
u64 val;
u64 event = ev->attr.config;
val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
if (val == 0xC || isa3XX_check_attr_config(ev))
return -EINVAL;
return 0;
}
GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC);
GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC);
GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL);
@ -437,6 +449,7 @@ static struct power_pmu power9_pmu = {
.attr_groups = power9_pmu_attr_groups,
.bhrb_nr = 32,
.capabilities = PERF_PMU_CAP_EXTENDED_REGS,
.check_attr_config = power9_check_attr_config,
};
int init_power9_pmu(void)