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synced 2024-11-13 23:34:05 +08:00
fbdev: i.MX31: fix panning, error handling, clean up
1. check for errors returned from clk_get() 2. fix "Unbalanced enable for IRQ 160" 3. fix transmit descriptor handling in panning 4. clean frame buffer on blank - useful for OLED displays 5. formatting clean up Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -400,12 +400,12 @@ static void sdc_disable_channel(struct mx3fb_info *mx3_fbi)
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static int sdc_set_window_pos(struct mx3fb_data *mx3fb, enum ipu_channel channel,
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int16_t x_pos, int16_t y_pos)
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{
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x_pos += mx3fb->h_start_width;
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y_pos += mx3fb->v_start_width;
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if (channel != IDMAC_SDC_0)
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return -EINVAL;
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x_pos += mx3fb->h_start_width;
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y_pos += mx3fb->v_start_width;
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mx3fb_write_reg(mx3fb, (x_pos << 16) | y_pos, SDC_BG_POS);
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return 0;
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}
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@ -491,11 +491,13 @@ static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel,
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* 2^4 to get fractional part, as long as we stay under ~250MHz and on
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* i.MX31 it (HSP_CLK) is <= 178MHz. Currently 128.267MHz
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*/
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dev_dbg(mx3fb->dev, "pixel clk = %d\n", pixel_clk);
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ipu_clk = clk_get(mx3fb->dev, NULL);
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div = clk_get_rate(ipu_clk) * 16 / pixel_clk;
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clk_put(ipu_clk);
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if (!IS_ERR(ipu_clk)) {
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div = clk_get_rate(ipu_clk) * 16 / pixel_clk;
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clk_put(ipu_clk);
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} else {
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div = 0;
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}
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if (div < 0x40) { /* Divider less than 4 */
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dev_dbg(mx3fb->dev,
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@ -503,6 +505,9 @@ static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel,
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div = 0x40;
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}
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dev_dbg(mx3fb->dev, "pixel clk = %u, divider %u.%u\n",
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pixel_clk, div >> 4, (div & 7) * 125);
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spin_lock_irqsave(&mx3fb->lock, lock_flags);
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/*
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@ -515,16 +520,16 @@ static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel,
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/* DI settings */
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old_conf = mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF) & 0x78FFFFFF;
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old_conf |= sig.datamask_en << DI_D3_DATAMSK_SHIFT |
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sig.clksel_en << DI_D3_CLK_SEL_SHIFT |
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sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT;
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sig.clksel_en << DI_D3_CLK_SEL_SHIFT |
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sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT;
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mx3fb_write_reg(mx3fb, old_conf, DI_DISP_IF_CONF);
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old_conf = mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL) & 0xE0FFFFFF;
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old_conf |= sig.data_pol << DI_D3_DATA_POL_SHIFT |
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sig.clk_pol << DI_D3_CLK_POL_SHIFT |
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sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT |
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sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT |
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sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT;
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sig.clk_pol << DI_D3_CLK_POL_SHIFT |
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sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT |
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sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT |
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sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT;
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mx3fb_write_reg(mx3fb, old_conf, DI_DISP_SIG_POL);
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switch (pixel_fmt) {
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@ -721,7 +726,6 @@ static int mx3fb_set_par(struct fb_info *fbi)
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struct idmac_channel *ichan = mx3_fbi->idmac_channel;
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struct idmac_video_param *video = &ichan->params.video;
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struct scatterlist *sg = mx3_fbi->sg;
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size_t screen_size;
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dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+');
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@ -745,12 +749,10 @@ static int mx3fb_set_par(struct fb_info *fbi)
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}
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}
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screen_size = fbi->fix.line_length * fbi->var.yres;
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sg_init_table(&sg[0], 1);
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sg_init_table(&sg[1], 1);
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sg_dma_address(&sg[0]) = fbi->fix.smem_start;
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sg_dma_address(&sg[0]) = fbi->fix.smem_start;
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sg_set_page(&sg[0], virt_to_page(fbi->screen_base),
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fbi->fix.smem_len,
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offset_in_page(fbi->screen_base));
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@ -927,7 +929,7 @@ static int mx3fb_setcolreg(unsigned int regno, unsigned int red,
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u32 val;
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int ret = 1;
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dev_dbg(fbi->device, "%s\n", __func__);
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dev_dbg(fbi->device, "%s, regno = %u\n", __func__, regno);
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mutex_lock(&mx3_fbi->mutex);
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/*
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@ -973,9 +975,8 @@ static int mx3fb_blank(int blank, struct fb_info *fbi)
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struct mx3fb_info *mx3_fbi = fbi->par;
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struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
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dev_dbg(fbi->device, "%s\n", __func__);
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dev_dbg(fbi->device, "blank = %d\n", blank);
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dev_dbg(fbi->device, "%s, blank = %d, base %p, len %u\n", __func__,
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blank, fbi->screen_base, fbi->fix.smem_len);
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if (mx3_fbi->blank == blank)
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return 0;
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@ -988,8 +989,11 @@ static int mx3fb_blank(int blank, struct fb_info *fbi)
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case FB_BLANK_VSYNC_SUSPEND:
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case FB_BLANK_HSYNC_SUSPEND:
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case FB_BLANK_NORMAL:
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sdc_disable_channel(mx3_fbi);
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sdc_set_brightness(mx3fb, 0);
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memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
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/* Give LCD time to update - enough for 50 and 60 Hz */
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msleep(25);
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sdc_disable_channel(mx3_fbi);
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break;
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case FB_BLANK_UNBLANK:
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sdc_enable_channel(mx3_fbi);
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@ -1063,6 +1067,7 @@ static int mx3fb_pan_display(struct fb_var_screeninfo *var,
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mutex_unlock(&mx3_fbi->mutex);
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dev_info(fbi->device, "Panning failed due to %s\n", ret < 0 ?
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"user interrupt" : "timeout");
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disable_irq(mx3_fbi->idmac_channel->eof_irq);
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return ret ? : -ETIMEDOUT;
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}
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@ -1073,6 +1078,9 @@ static int mx3fb_pan_display(struct fb_var_screeninfo *var,
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virt_to_page(fbi->screen_base + offset), fbi->fix.smem_len,
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offset_in_page(fbi->screen_base + offset));
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if (mx3_fbi->txd)
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async_tx_ack(mx3_fbi->txd);
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txd = dma_chan->device->device_prep_slave_sg(dma_chan, sg +
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mx3_fbi->cur_ipu_buf, 1, DMA_TO_DEVICE, DMA_PREP_INTERRUPT);
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if (!txd) {
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@ -1099,8 +1107,6 @@ static int mx3fb_pan_display(struct fb_var_screeninfo *var,
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return -EIO;
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}
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if (mx3_fbi->txd)
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async_tx_ack(mx3_fbi->txd);
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mx3_fbi->txd = txd;
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fbi->var.xoffset = var->xoffset;
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@ -1506,7 +1512,7 @@ static struct platform_driver mx3fb_driver = {
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* example:
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* video=mx3fb:bpp=16
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*/
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static int mx3fb_setup(void)
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static int __init mx3fb_setup(void)
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{
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#ifndef MODULE
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char *opt, *options = NULL;
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