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cxgb4: handle interrupt raised when FW crashes

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Handle TIMER0INT when FW crashes. Check for PCIE_FW[FW_EVAL]
and if it says "Device FW Crashed", then treat it as fatal.
Else, non-fatal.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Rahul Lakkireddy 2017-06-09 11:12:35 +05:30 committed by David S. Miller
parent 9438d27a9b
commit d86cc04e22
3 changed files with 26 additions and 1 deletions
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19
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
View File

@ -4040,6 +4040,7 @@ static void cim_intr_handler(struct adapter *adapter)
{ MBHOSTPARERR_F, "CIM mailbox host parity error", -1, 1 },
{ TIEQINPARERRINT_F, "CIM TIEQ outgoing parity error", -1, 1 },
{ TIEQOUTPARERRINT_F, "CIM TIEQ incoming parity error", -1, 1 },
{ TIMER0INT_F, "CIM TIMER0 interrupt", -1, 1 },
{ 0 }
};
static const struct intr_info cim_upintr_info[] = {
@ -4074,11 +4075,27 @@ static void cim_intr_handler(struct adapter *adapter)
{ 0 }
};
u32 val, fw_err;
int fat;
if (t4_read_reg(adapter, PCIE_FW_A) & PCIE_FW_ERR_F)
fw_err = t4_read_reg(adapter, PCIE_FW_A);
if (fw_err & PCIE_FW_ERR_F)
t4_report_fw_error(adapter);
/* When the Firmware detects an internal error which normally
* wouldn't raise a Host Interrupt, it forces a CIM Timer0 interrupt
* in order to make sure the Host sees the Firmware Crash. So
* if we have a Timer0 interrupt and don't see a Firmware Crash,
* ignore the Timer0 interrupt.
*/
val = t4_read_reg(adapter, CIM_HOST_INT_CAUSE_A);
if (val & TIMER0INT_F)
if (!(fw_err & PCIE_FW_ERR_F) ||
(PCIE_FW_EVAL_G(fw_err) != PCIE_FW_EVAL_CRASH))
t4_write_reg(adapter, CIM_HOST_INT_CAUSE_A,
TIMER0INT_F);
fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE_A,
cim_intr_info) +
t4_handle_intr_status(adapter, CIM_HOST_UPACC_INT_CAUSE_A,

4
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h
View File

@ -1077,6 +1077,10 @@
#define TIEQINPARERRINT_V(x) ((x) << TIEQINPARERRINT_S)
#define TIEQINPARERRINT_F TIEQINPARERRINT_V(1U)
#define TIMER0INT_S 2
#define TIMER0INT_V(x) ((x) << TIMER0INT_S)
#define TIMER0INT_F TIMER0INT_V(1U)
#define PREFDROPINT_S 1
#define PREFDROPINT_V(x) ((x) << PREFDROPINT_S)
#define PREFDROPINT_F PREFDROPINT_V(1U)

4
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
View File

@ -3088,6 +3088,10 @@ struct fw_debug_cmd {
#define FW_DEBUG_CMD_TYPE_G(x) \
(((x) >> FW_DEBUG_CMD_TYPE_S) & FW_DEBUG_CMD_TYPE_M)
enum pcie_fw_eval {
PCIE_FW_EVAL_CRASH = 0,
};
#define PCIE_FW_ERR_S 31
#define PCIE_FW_ERR_V(x) ((x) << PCIE_FW_ERR_S)
#define PCIE_FW_ERR_F PCIE_FW_ERR_V(1U)