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ARM: SoC fixes
A collection of fixes from the last few weeks. Most of them are smaller tweaks and fixes to DT and hardware descriptions for boards. Some of the more significant ones are: - eMMC and RGMII stability tweaks for rk3288 - DDC fixes for Rock PI 4 - Audio fixes for two TI am335x eval boards - D_CAN clock fix for am335x - Compilation fixes for clang - !SMP compilation fix for one of the new platforms this release (milbeaut) - A revert of a gpio fix for nomadik that instead was fixed in the gpio subsystem - Whitespace fix for the DT JSON schema (no tabs allowed) -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlyqfiYPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3kksP/1qgJroBZDHlBl8VLnfhsBoT9AQrDtA/aek2 AEwzRyp6Iapo5Wg+8UvXBzfAR5lC9kQo+NX66iHwTgG8S62evM2ptwkpaADquZSL KB1qOV5be30nDn6j5FBcCL2Er27VgDMKcsA/W2tPnQhYtkRetdsM6/rpCfFIbVAG hYqCNC6uw13g08cb5xsvwYxIBGWvzoBmh+h6RFUdoyIL3sX2tNL+31kshBV6BCkA zLURCcaY9ZypCuuBgNpJIbiFR5hv07NUTdvKa65OxcJhr98dNsmSrNq856wWsbB1 jdnZTH+cDBSvOMtonWZoMu8sRDLPfyfMzb+WAzbjNwvXToFUU6337l3HsDOwxjk3 yphhMt5Yzc3b51aOvBfYRISiys7unrP3KLRg6A8N5CFakbi8vtLRCRhsf8iYJYyY h6gNdQ2C9456Sy43B6Bq90U5YK2aT65Tjh8sSUsQSgUiZ3/yUisvdt+7EapTQCTP S/wia74mexYgfD405ejMUu9G5OaXcs8P/M1+k1z5HqcFdt7QuMkPj0UfLV8v3eMT /R8h1FVMjTgcCwEgkNZyvVih1Ke7fn6Vb4J+z5GPHuJFtfq+mdPVdvHnMIW/vrKg ckJSwyzW1ZUDeQVPnWZ1wG1N4aqhe+Ihlr01pMFG+tcN4UAF4fhKGJxV+sDM+tEi vDTol7/u =Vxr8 -----END PGP SIGNATURE----- Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "A collection of fixes from the last few weeks. Most of them are smaller tweaks and fixes to DT and hardware descriptions for boards. Some of the more significant ones are: - eMMC and RGMII stability tweaks for rk3288 - DDC fixes for Rock PI 4 - Audio fixes for two TI am335x eval boards - D_CAN clock fix for am335x - Compilation fixes for clang - !HOTPLUG_CPU compilation fix for one of the new platforms this release (milbeaut) - A revert of a gpio fix for nomadik that instead was fixed in the gpio subsystem - Whitespace fix for the DT JSON schema (no tabs allowed)" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) ARM: milbeaut: fix build with !CONFIG_HOTPLUG_CPU ARM: iop: don't use using 64-bit DMA masks ARM: orion: don't use using 64-bit DMA masks Revert "ARM: dts: nomadik: Fix polarity of SPI CS" dt-bindings: cpu: Fix JSON schema arm/mach-at91/pm : fix possible object reference leak ARM: dts: at91: Fix typo in ISC_D0 on PC9 ARM: dts: Fix dcan clkctrl clock for am3 reset: meson-audio-arb: Fix missing .owner setting of reset_controller_dev dt-bindings: reset: meson-g12a: Add missing USB2 PHY resets ARM: dts: rockchip: Remove #address/#size-cells from rk3288-veyron gpio-keys ARM: dts: rockchip: Remove #address/#size-cells from rk3288 mipi_dsi ARM: dts: rockchip: Fix gpu opp node names for rk3288 ARM: dts: am335x-evmsk: Correct the regulators for the audio codec ARM: dts: am335x-evm: Correct the regulators for the audio codec ARM: OMAP2+: add missing of_node_put after of_device_is_available ARM: OMAP1: ams-delta: Fix broken GPIO ID allocation arm64: dts: stratix10: add the sysmgr-syscon property from the gmac's arm64: dts: rockchip: fix rk3328 sdmmc0 write errors arm64: dts: rockchip: fix rk3328 rgmii high tx error rate ...
This commit is contained in:
commit
d8491223bc
@ -228,7 +228,7 @@ patternProperties:
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- renesas,r9a06g032-smp
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- rockchip,rk3036-smp
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- rockchip,rk3066-smp
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- socionext,milbeaut-m10v-smp
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- socionext,milbeaut-m10v-smp
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- ste,dbx500-smp
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cpu-release-addr:
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@ -57,6 +57,24 @@
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enable-active-high;
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};
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/* TPS79501 */
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v1_8d_reg: fixedregulator-v1_8d {
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compatible = "regulator-fixed";
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regulator-name = "v1_8d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* TPS79501 */
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v3_3d_reg: fixedregulator-v3_3d {
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compatible = "regulator-fixed";
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regulator-name = "v3_3d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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matrix_keypad: matrix_keypad0 {
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compatible = "gpio-matrix-keypad";
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debounce-delay-ms = <5>;
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@ -499,10 +517,10 @@
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status = "okay";
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/* Regulators */
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AVDD-supply = <&vaux2_reg>;
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IOVDD-supply = <&vaux2_reg>;
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DRVDD-supply = <&vaux2_reg>;
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DVDD-supply = <&vbat>;
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AVDD-supply = <&v3_3d_reg>;
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IOVDD-supply = <&v3_3d_reg>;
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DRVDD-supply = <&v3_3d_reg>;
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DVDD-supply = <&v1_8d_reg>;
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};
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};
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@ -73,6 +73,24 @@
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enable-active-high;
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};
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/* TPS79518 */
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v1_8d_reg: fixedregulator-v1_8d {
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compatible = "regulator-fixed";
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regulator-name = "v1_8d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* TPS78633 */
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v3_3d_reg: fixedregulator-v3_3d {
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compatible = "regulator-fixed";
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regulator-name = "v3_3d";
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vin-supply = <&vbat>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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@ -501,10 +519,10 @@
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status = "okay";
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/* Regulators */
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AVDD-supply = <&vaux2_reg>;
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IOVDD-supply = <&vaux2_reg>;
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DRVDD-supply = <&vaux2_reg>;
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DVDD-supply = <&vbat>;
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AVDD-supply = <&v3_3d_reg>;
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IOVDD-supply = <&v3_3d_reg>;
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DRVDD-supply = <&v3_3d_reg>;
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DVDD-supply = <&v1_8d_reg>;
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};
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};
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@ -1762,7 +1762,7 @@
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reg = <0xcc000 0x4>;
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reg-names = "rev";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM3_D_CAN0_CLKCTRL 0>;
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clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -1785,7 +1785,7 @@
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reg = <0xd0000 0x4>;
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reg-names = "rev";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM3_D_CAN1_CLKCTRL 0>;
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clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -254,6 +254,7 @@
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};
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vccio_sd: LDO_REG5 {
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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@ -430,7 +431,7 @@
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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broken-cd;
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disable-wp; /* wp not hooked up */
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
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@ -25,8 +25,6 @@
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gpio_keys: gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_key_l>;
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@ -70,7 +70,7 @@
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compatible = "arm,cortex-a12";
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reg = <0x501>;
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resets = <&cru SRST_CORE1>;
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operating-points = <&cpu_opp_table>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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@ -80,7 +80,7 @@
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compatible = "arm,cortex-a12";
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reg = <0x502>;
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resets = <&cru SRST_CORE2>;
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operating-points = <&cpu_opp_table>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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@ -90,7 +90,7 @@
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compatible = "arm,cortex-a12";
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reg = <0x503>;
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resets = <&cru SRST_CORE3>;
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operating-points = <&cpu_opp_table>;
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operating-points-v2 = <&cpu_opp_table>;
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#cooling-cells = <2>; /* min followed by max */
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clock-latency = <40000>;
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clocks = <&cru ARMCLK>;
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@ -1119,8 +1119,6 @@
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clock-names = "ref", "pclk";
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power-domains = <&power RK3288_PD_VIO>;
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rockchip,grf = <&grf>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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ports {
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@ -1282,27 +1280,27 @@
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gpu_opp_table: gpu-opp-table {
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compatible = "operating-points-v2";
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opp@100000000 {
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <950000>;
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};
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opp@200000000 {
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <950000>;
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};
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opp@300000000 {
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <1000000>;
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};
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opp@400000000 {
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1100000>;
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};
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opp@500000000 {
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opp-500000000 {
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <1200000>;
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};
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opp@600000000 {
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <1250000>;
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};
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@ -518,7 +518,7 @@
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#define PIN_PC9__GPIO PINMUX_PIN(PIN_PC9, 0, 0)
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#define PIN_PC9__FIQ PINMUX_PIN(PIN_PC9, 1, 3)
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#define PIN_PC9__GTSUCOMP PINMUX_PIN(PIN_PC9, 2, 1)
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#define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 2, 1)
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#define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 3, 1)
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#define PIN_PC9__TIOA4 PINMUX_PIN(PIN_PC9, 4, 2)
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#define PIN_PC10 74
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#define PIN_PC10__GPIO PINMUX_PIN(PIN_PC10, 0, 0)
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@ -213,13 +213,12 @@
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gpio-sck = <&gpio0 5 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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/*
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* This chipselect is active high. Just setting the flags
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* to GPIO_ACTIVE_HIGH is not enough for the SPI DT bindings,
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* it will be ignored, only the special "spi-cs-high" flag
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* really counts.
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* It's not actually active high, but the frameworks assume
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* the polarity of the passed-in GPIO is "normal" (active
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* high) then actively drives the line low to select the
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* chip.
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*/
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cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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spi-cs-high;
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num-chipselects = <1>;
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/*
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@ -591,13 +591,13 @@ static int __init at91_pm_backup_init(void)
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
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if (!np)
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goto securam_fail;
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goto securam_fail_no_ref_dev;
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pdev = of_find_device_by_node(np);
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of_node_put(np);
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if (!pdev) {
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pr_warn("%s: failed to find securam device!\n", __func__);
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goto securam_fail;
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goto securam_fail_no_ref_dev;
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}
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sram_pool = gen_pool_get(&pdev->dev, NULL);
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@ -620,6 +620,8 @@ static int __init at91_pm_backup_init(void)
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return 0;
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securam_fail:
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put_device(&pdev->dev);
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securam_fail_no_ref_dev:
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iounmap(pm_data.sfrbu);
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pm_data.sfrbu = NULL;
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return ret;
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@ -300,7 +300,7 @@ static struct resource iop13xx_adma_2_resources[] = {
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}
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};
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static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
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static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(32);
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static struct iop_adma_platform_data iop13xx_adma_0_data = {
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.hw_id = 0,
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.pool_size = PAGE_SIZE,
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@ -324,7 +324,7 @@ static struct platform_device iop13xx_adma_0_channel = {
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.resource = iop13xx_adma_0_resources,
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.dev = {
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.dma_mask = &iop13xx_adma_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(64),
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = (void *) &iop13xx_adma_0_data,
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},
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};
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@ -336,7 +336,7 @@ static struct platform_device iop13xx_adma_1_channel = {
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.resource = iop13xx_adma_1_resources,
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.dev = {
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.dma_mask = &iop13xx_adma_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(64),
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = (void *) &iop13xx_adma_1_data,
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},
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};
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@ -348,7 +348,7 @@ static struct platform_device iop13xx_adma_2_channel = {
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.resource = iop13xx_adma_2_resources,
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.dev = {
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.dma_mask = &iop13xx_adma_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(64),
|
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.coherent_dma_mask = DMA_BIT_MASK(32),
|
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.platform_data = (void *) &iop13xx_adma_2_data,
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},
|
||||
};
|
||||
|
@ -152,7 +152,7 @@ static struct resource iop13xx_tpmi_3_resources[] = {
|
||||
}
|
||||
};
|
||||
|
||||
u64 iop13xx_tpmi_mask = DMA_BIT_MASK(64);
|
||||
u64 iop13xx_tpmi_mask = DMA_BIT_MASK(32);
|
||||
static struct platform_device iop13xx_tpmi_0_device = {
|
||||
.name = "iop-tpmi",
|
||||
.id = 0,
|
||||
@ -160,7 +160,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
|
||||
.resource = iop13xx_tpmi_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
@ -171,7 +171,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
|
||||
.resource = iop13xx_tpmi_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
@ -182,7 +182,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
|
||||
.resource = iop13xx_tpmi_2_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
@ -193,7 +193,7 @@ static struct platform_device iop13xx_tpmi_3_device = {
|
||||
.resource = iop13xx_tpmi_3_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -65,6 +65,7 @@ static void m10v_smp_init(unsigned int max_cpus)
|
||||
writel(KERNEL_UNBOOT_FLAG, m10v_smp_base + cpu * 4);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static void m10v_cpu_die(unsigned int l_cpu)
|
||||
{
|
||||
gic_cpu_if_down(0);
|
||||
@ -83,12 +84,15 @@ static int m10v_cpu_kill(unsigned int l_cpu)
|
||||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct smp_operations m10v_smp_ops __initdata = {
|
||||
.smp_prepare_cpus = m10v_smp_init,
|
||||
.smp_boot_secondary = m10v_boot_secondary,
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
.cpu_die = m10v_cpu_die,
|
||||
.cpu_kill = m10v_cpu_kill,
|
||||
#endif
|
||||
};
|
||||
CPU_METHOD_OF_DECLARE(m10v_smp, "socionext,milbeaut-m10v-smp", &m10v_smp_ops);
|
||||
|
||||
|
@ -182,6 +182,7 @@ static struct resource latch1_resources[] = {
|
||||
|
||||
static struct bgpio_pdata latch1_pdata = {
|
||||
.label = LATCH1_LABEL,
|
||||
.base = -1,
|
||||
.ngpio = LATCH1_NGPIO,
|
||||
};
|
||||
|
||||
@ -219,6 +220,7 @@ static struct resource latch2_resources[] = {
|
||||
|
||||
static struct bgpio_pdata latch2_pdata = {
|
||||
.label = LATCH2_LABEL,
|
||||
.base = -1,
|
||||
.ngpio = LATCH2_NGPIO,
|
||||
};
|
||||
|
||||
|
@ -250,8 +250,10 @@ static int __init omapdss_init_of(void)
|
||||
if (!node)
|
||||
return 0;
|
||||
|
||||
if (!of_device_is_available(node))
|
||||
if (!of_device_is_available(node)) {
|
||||
of_node_put(node);
|
||||
return 0;
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
|
||||
|
@ -143,7 +143,7 @@ struct platform_device iop3xx_dma_0_channel = {
|
||||
.resource = iop3xx_dma_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_dma_0_data,
|
||||
},
|
||||
};
|
||||
@ -155,7 +155,7 @@ struct platform_device iop3xx_dma_1_channel = {
|
||||
.resource = iop3xx_dma_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_dma_1_data,
|
||||
},
|
||||
};
|
||||
@ -167,7 +167,7 @@ struct platform_device iop3xx_aau_channel = {
|
||||
.resource = iop3xx_aau_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_aau_data,
|
||||
},
|
||||
};
|
||||
|
@ -622,7 +622,7 @@ static struct platform_device orion_xor0_shared = {
|
||||
.resource = orion_xor0_shared_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &orion_xor0_pdata,
|
||||
},
|
||||
};
|
||||
@ -683,7 +683,7 @@ static struct platform_device orion_xor1_shared = {
|
||||
.resource = orion_xor1_shared_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &orion_xor1_pdata,
|
||||
},
|
||||
};
|
||||
|
@ -162,6 +162,7 @@
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 1>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -179,6 +180,7 @@
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 2>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -196,6 +198,7 @@
|
||||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 3>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -108,8 +108,8 @@
|
||||
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x25>;
|
||||
rx_delay = <0x11>;
|
||||
tx_delay = <0x24>;
|
||||
rx_delay = <0x18>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -46,8 +46,7 @@
|
||||
|
||||
vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb20_host_drv>;
|
||||
regulator-name = "vcc_host1_5v";
|
||||
|
@ -1445,11 +1445,11 @@
|
||||
|
||||
sdmmc0 {
|
||||
sdmmc0_clk: sdmmc0-clk {
|
||||
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>;
|
||||
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_cmd: sdmmc0-cmd {
|
||||
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_dectn: sdmmc0-dectn {
|
||||
@ -1461,14 +1461,14 @@
|
||||
};
|
||||
|
||||
sdmmc0_bus1: sdmmc0-bus1 {
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_bus4: sdmmc0-bus4 {
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA1 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA2 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA3 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA1 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA2 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA3 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_gpio: sdmmc0-gpio {
|
||||
@ -1642,50 +1642,50 @@
|
||||
rgmiim1_pins: rgmiim1-pins {
|
||||
rockchip,pins =
|
||||
/* mac_txclk */
|
||||
<1 RK_PB4 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB4 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_rxclk */
|
||||
<1 RK_PB5 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB5 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_mdio */
|
||||
<1 RK_PC3 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC3 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txen */
|
||||
<1 RK_PD1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PD1 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_clk */
|
||||
<1 RK_PC5 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC5 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxdv */
|
||||
<1 RK_PC6 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC6 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_mdc */
|
||||
<1 RK_PC7 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC7 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd1 */
|
||||
<1 RK_PB2 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB2 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd0 */
|
||||
<1 RK_PB3 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB3 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd1 */
|
||||
<1 RK_PB0 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB0 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd0 */
|
||||
<1 RK_PB1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB1 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_rxd3 */
|
||||
<1 RK_PB6 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB6 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd2 */
|
||||
<1 RK_PB7 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB7 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd3 */
|
||||
<1 RK_PC0 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PC0 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd2 */
|
||||
<1 RK_PC1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PC1 2 &pcfg_pull_none_8ma>,
|
||||
|
||||
/* mac_txclk */
|
||||
<0 RK_PB0 1 &pcfg_pull_none>,
|
||||
<0 RK_PB0 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txen */
|
||||
<0 RK_PB4 1 &pcfg_pull_none>,
|
||||
<0 RK_PB4 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_clk */
|
||||
<0 RK_PD0 1 &pcfg_pull_none>,
|
||||
<0 RK_PD0 1 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd1 */
|
||||
<0 RK_PC0 1 &pcfg_pull_none>,
|
||||
<0 RK_PC0 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd0 */
|
||||
<0 RK_PC1 1 &pcfg_pull_none>,
|
||||
<0 RK_PC1 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd3 */
|
||||
<0 RK_PC7 1 &pcfg_pull_none>,
|
||||
<0 RK_PC7 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd2 */
|
||||
<0 RK_PC6 1 &pcfg_pull_none>;
|
||||
<0 RK_PC6 1 &pcfg_pull_none_8ma>;
|
||||
};
|
||||
|
||||
rmiim1_pins: rmiim1-pins {
|
||||
|
@ -158,6 +158,7 @@
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_cec>;
|
||||
status = "okay";
|
||||
|
@ -130,6 +130,7 @@ static int meson_audio_arb_probe(struct platform_device *pdev)
|
||||
arb->rstc.nr_resets = ARRAY_SIZE(axg_audio_arb_reset_bits);
|
||||
arb->rstc.ops = &meson_audio_arb_rstc_ops;
|
||||
arb->rstc.of_node = dev->of_node;
|
||||
arb->rstc.owner = THIS_MODULE;
|
||||
|
||||
/*
|
||||
* Enable general :
|
||||
|
@ -51,7 +51,10 @@
|
||||
#define RESET_SD_EMMC_A 44
|
||||
#define RESET_SD_EMMC_B 45
|
||||
#define RESET_SD_EMMC_C 46
|
||||
/* 47-60 */
|
||||
/* 47 */
|
||||
#define RESET_USB_PHY20 48
|
||||
#define RESET_USB_PHY21 49
|
||||
/* 50-60 */
|
||||
#define RESET_AUDIO_CODEC 61
|
||||
/* 62-63 */
|
||||
/* RESET2 */
|
||||
|
Loading…
Reference in New Issue
Block a user