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bus: ti-sysc: Add module enable quirk for SGX on omap36xx
Add module enable quirk for SGX needed on omap36xx. Cc: Adam Ford <aford173@gmail.com> Cc: Filip Matijević <filip.matijevic.pz@gmail.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: moaz korena <moaz@korena.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Cc: Philipp Rossak <embed3d@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -73,6 +73,7 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = {
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* @clk_enable_quirk: module specific clock enable quirk
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* @clk_disable_quirk: module specific clock disable quirk
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* @reset_done_quirk: module specific reset done quirk
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* @module_enable_quirk: module specific enable quirk
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*/
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struct sysc {
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struct device *dev;
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@ -98,6 +99,7 @@ struct sysc {
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void (*clk_enable_quirk)(struct sysc *sysc);
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void (*clk_disable_quirk)(struct sysc *sysc);
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void (*reset_done_quirk)(struct sysc *sysc);
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void (*module_enable_quirk)(struct sysc *sysc);
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};
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static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
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@ -928,6 +930,9 @@ set_autoidle:
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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}
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if (ddata->module_enable_quirk)
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ddata->module_enable_quirk(ddata);
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return 0;
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}
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@ -1241,6 +1246,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("gpu", 0x50000000, 0x14, -1, -1, 0x00010201, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff,
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SYSC_MODULE_QUIRK_SGX),
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SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
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SYSC_MODULE_QUIRK_WDT),
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@ -1258,6 +1266,7 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
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SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
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SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, 0),
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SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
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SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
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SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0),
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@ -1409,6 +1418,15 @@ static void sysc_clk_disable_quirk_i2c(struct sysc *ddata)
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sysc_clk_quirk_i2c(ddata, false);
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}
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/* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */
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static void sysc_module_enable_quirk_sgx(struct sysc *ddata)
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{
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int offset = 0xff08; /* OCP_DEBUG_CONFIG */
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u32 val = BIT(31); /* THALIA_INT_BYPASS */
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sysc_write(ddata, offset, val);
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}
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/* Watchdog timer needs a disable sequence after reset */
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static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
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{
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@ -1451,6 +1469,9 @@ static void sysc_init_module_quirks(struct sysc *ddata)
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return;
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}
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if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
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ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
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if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT)
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ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
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}
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@ -49,6 +49,7 @@ struct sysc_regbits {
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s8 emufree_shift;
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};
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#define SYSC_MODULE_QUIRK_SGX BIT(18)
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#define SYSC_MODULE_QUIRK_HDQ1W BIT(17)
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#define SYSC_MODULE_QUIRK_I2C BIT(16)
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#define SYSC_MODULE_QUIRK_WDT BIT(15)
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