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Staging: sm7xx: add a new framebuffer driver
Yeeloong netbook has a sm712 video card, need this driver, but it is not ready to upstream yet, so, go to drivers/staing at first. This source code is originally from Silicon Motion Technology Corp, and maintained at http://dev.lemote.com/code/linux_loongson for YeeLoong netbook. I have done a lot of cleanups for it and merged it into my git repository at http://dev.lemote.com/code/rt4ls. Thanks to Simon for testing it on a little-endian x86 platform. Thanks to Olivier Croset <olivier.croset@actis-computer.com> for reporting the problem about __BIG_ENDIAN compiling problem and send a relative patch. The suspend/resume and blank support are contributed by Jason from Silicon Motion Technology. Tested-by: Simon Braunschmidt <sbraun@emlix.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Wu Zhangjin
Greg Kroah-Hartman
parent
193cb93e5a
commit
d7edf47947
@ -145,5 +145,7 @@ source "drivers/staging/wavelan/Kconfig"
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source "drivers/staging/netwave/Kconfig"
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source "drivers/staging/sm7xx/Kconfig"
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endif # !STAGING_EXCLUDE_BUILD
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endif # STAGING
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@ -53,3 +53,4 @@ obj-$(CONFIG_ARLAN) += arlan/
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obj-$(CONFIG_WAVELAN) += wavelan/
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obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/
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obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/
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obj-$(CONFIG_FB_SM7XX) += sm7xx/
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15
drivers/staging/sm7xx/Kconfig
Normal file
15
drivers/staging/sm7xx/Kconfig
Normal file
@ -0,0 +1,15 @@
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config FB_SM7XX
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tristate "Silicon Motion SM7XX Frame Buffer Support"
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depends on FB
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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Frame Buffer driver for the Silicon Motion SM7XX serial graphic card.
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config FB_SM7XX_ACCEL
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bool "Siliconmotion Acceleration functions (EXPERIMENTAL)"
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depends on FB_SM7XX && EXPERIMENTAL
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help
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This will compile the Trident frame buffer device with
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acceleration functions.
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3
drivers/staging/sm7xx/Makefile
Normal file
3
drivers/staging/sm7xx/Makefile
Normal file
@ -0,0 +1,3 @@
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obj-$(CONFIG_FB_SM7XX) += sm7xx.o
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sm7xx-y := smtcfb.o
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10
drivers/staging/sm7xx/TODO
Normal file
10
drivers/staging/sm7xx/TODO
Normal file
@ -0,0 +1,10 @@
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TODO:
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- Dual head support
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- use kernel coding style
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- checkpatch.pl clean
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- refine the code and remove unused code
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- use kernel framebuffer mode setting instead of hard code
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- move it to drivers/video/sm7xx/ or make it be drivers/video/sm7xxfb.c
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Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
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Teddy Wang <teddy.wang@siliconmotion.com.cn>.
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979
drivers/staging/sm7xx/smtc2d.c
Normal file
979
drivers/staging/sm7xx/smtc2d.c
Normal file
@ -0,0 +1,979 @@
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/*
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* Silicon Motion SM7XX 2D drawing engine functions.
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*
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* Copyright (C) 2006 Silicon Motion Technology Corp.
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* Author: Boyod boyod.yang@siliconmotion.com.cn
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*
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* Copyright (C) 2009 Lemote, Inc.
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* Author: Wu Zhangjin, wuzj@lemote.com
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*
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* Version 0.10.26192.21.01
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* - Add PowerPC support
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* - Add 2D support for Lynx -
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* Verified on 2.6.19.2
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* Boyod.yang <boyod.yang@siliconmotion.com.cn>
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*/
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unsigned char smtc_de_busy;
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void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData)
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{
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writel(nData, smtc_2DBaseAddress + nOffset);
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}
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unsigned long SMTC_read2Dreg(unsigned long nOffset)
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{
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return readl(smtc_2DBaseAddress + nOffset);
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}
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void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData)
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{
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writel(nData, smtc_2Ddataport + nOffset);
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}
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/**********************************************************************
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*
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* deInit
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*
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* Purpose
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* Drawing engine initialization.
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*
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**********************************************************************/
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void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
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unsigned int bpp)
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{
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/* Get current power configuration. */
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unsigned char clock;
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clock = smtc_seqr(0x21);
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/* initialize global 'mutex lock' variable */
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smtc_de_busy = 0;
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/* Enable 2D Drawing Engine */
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smtc_seqw(0x21, clock & 0xF8);
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SMTC_write2Dreg(DE_CLIP_TL,
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FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) |
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FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) |
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FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
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FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0));
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if (bpp >= 24) {
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION,
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nModeWidth * 3) | FIELD_VALUE(0,
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DE_PITCH,
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SOURCE,
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nModeWidth
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* 3));
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} else {
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION,
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nModeWidth) | FIELD_VALUE(0,
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DE_PITCH,
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SOURCE,
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nModeWidth));
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}
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SMTC_write2Dreg(DE_WINDOW_WIDTH,
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
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nModeWidth) | FIELD_VALUE(0,
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DE_WINDOW_WIDTH,
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SOURCE,
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nModeWidth));
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switch (bpp) {
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case 8:
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SMTC_write2Dreg(DE_STRETCH_FORMAT,
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FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
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NORMAL) | FIELD_VALUE(0,
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DE_STRETCH_FORMAT,
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PATTERN_Y,
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0) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
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0) | FIELD_SET(0, DE_STRETCH_FORMAT,
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PIXEL_FORMAT,
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8) | FIELD_SET(0,
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DE_STRETCH_FORMAT,
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ADDRESSING,
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XY) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT,
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SOURCE_HEIGHT, 3));
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break;
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case 24:
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SMTC_write2Dreg(DE_STRETCH_FORMAT,
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FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
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NORMAL) | FIELD_VALUE(0,
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DE_STRETCH_FORMAT,
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PATTERN_Y,
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0) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
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0) | FIELD_SET(0, DE_STRETCH_FORMAT,
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PIXEL_FORMAT,
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24) | FIELD_SET(0,
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DE_STRETCH_FORMAT,
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ADDRESSING,
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XY) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT,
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SOURCE_HEIGHT, 3));
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break;
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case 16:
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default:
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SMTC_write2Dreg(DE_STRETCH_FORMAT,
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FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
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NORMAL) | FIELD_VALUE(0,
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DE_STRETCH_FORMAT,
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PATTERN_Y,
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0) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
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0) | FIELD_SET(0, DE_STRETCH_FORMAT,
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PIXEL_FORMAT,
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16) | FIELD_SET(0,
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DE_STRETCH_FORMAT,
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ADDRESSING,
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XY) |
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FIELD_VALUE(0, DE_STRETCH_FORMAT,
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SOURCE_HEIGHT, 3));
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break;
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}
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SMTC_write2Dreg(DE_MASKS,
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FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
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FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF));
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SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
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FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \
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0xFFFFFF));
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SMTC_write2Dreg(DE_COLOR_COMPARE,
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FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
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}
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void deVerticalLine(unsigned long dst_base,
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unsigned long dst_pitch,
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unsigned long nX,
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unsigned long nY,
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unsigned long dst_height, unsigned long nColor)
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{
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deWaitForNotBusy();
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SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
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FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
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dst_base));
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
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FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
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SMTC_write2Dreg(DE_WINDOW_WIDTH,
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
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SOURCE,
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dst_pitch));
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SMTC_write2Dreg(DE_FOREGROUND,
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FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
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SMTC_write2Dreg(DE_DESTINATION,
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FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
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FIELD_VALUE(0, DE_DESTINATION, X, nX) |
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FIELD_VALUE(0, DE_DESTINATION, Y, nY));
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SMTC_write2Dreg(DE_DIMENSION,
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FIELD_VALUE(0, DE_DIMENSION, X, 1) |
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FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
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SMTC_write2Dreg(DE_CONTROL,
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FIELD_SET(0, DE_CONTROL, STATUS, START) |
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FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
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FIELD_SET(0, DE_CONTROL, MAJOR, Y) |
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FIELD_SET(0, DE_CONTROL, STEP_X, NEGATIVE) |
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FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
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FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
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FIELD_SET(0, DE_CONTROL, COMMAND, SHORT_STROKE) |
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FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
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FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
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smtc_de_busy = 1;
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}
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void deHorizontalLine(unsigned long dst_base,
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unsigned long dst_pitch,
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unsigned long nX,
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unsigned long nY,
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unsigned long dst_width, unsigned long nColor)
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{
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deWaitForNotBusy();
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SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
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FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
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dst_base));
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
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FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
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SMTC_write2Dreg(DE_WINDOW_WIDTH,
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
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SOURCE,
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dst_pitch));
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SMTC_write2Dreg(DE_FOREGROUND,
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FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
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SMTC_write2Dreg(DE_DESTINATION,
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FIELD_SET(0, DE_DESTINATION, WRAP,
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DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X,
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nX) | FIELD_VALUE(0,
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DE_DESTINATION,
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Y,
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nY));
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SMTC_write2Dreg(DE_DIMENSION,
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FIELD_VALUE(0, DE_DIMENSION, X,
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dst_width) | FIELD_VALUE(0, DE_DIMENSION,
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Y_ET, 1));
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SMTC_write2Dreg(DE_CONTROL,
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FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0,
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DE_CONTROL,
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DIRECTION,
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RIGHT_TO_LEFT)
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| FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0,
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DE_CONTROL,
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STEP_X,
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POSITIVE)
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| FIELD_SET(0, DE_CONTROL, STEP_Y,
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NEGATIVE) | FIELD_SET(0, DE_CONTROL,
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LAST_PIXEL,
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OFF) | FIELD_SET(0,
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DE_CONTROL,
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COMMAND,
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SHORT_STROKE)
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| FIELD_SET(0, DE_CONTROL, ROP_SELECT,
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ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP,
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0x0C));
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smtc_de_busy = 1;
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}
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void deLine(unsigned long dst_base,
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unsigned long dst_pitch,
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unsigned long nX1,
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unsigned long nY1,
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unsigned long nX2, unsigned long nY2, unsigned long nColor)
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{
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unsigned long nCommand =
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FIELD_SET(0, DE_CONTROL, STATUS, START) |
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FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
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FIELD_SET(0, DE_CONTROL, MAJOR, X) |
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FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) |
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FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
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FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
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FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
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FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C);
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unsigned long DeltaX;
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unsigned long DeltaY;
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/* Calculate delta X */
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if (nX1 <= nX2)
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DeltaX = nX2 - nX1;
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else {
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DeltaX = nX1 - nX2;
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nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
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}
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/* Calculate delta Y */
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if (nY1 <= nY2)
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DeltaY = nY2 - nY1;
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else {
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DeltaY = nY1 - nY2;
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nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
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}
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/* Determine the major axis */
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if (DeltaX < DeltaY)
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nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
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/* Vertical line? */
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if (nX1 == nX2)
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deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
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/* Horizontal line? */
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else if (nY1 == nY2)
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deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \
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DeltaX, nColor);
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/* Diagonal line? */
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else if (DeltaX == DeltaY) {
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deWaitForNotBusy();
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SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
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FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
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ADDRESS, dst_base));
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0,
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DE_PITCH,
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SOURCE,
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dst_pitch));
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SMTC_write2Dreg(DE_WINDOW_WIDTH,
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0,
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DE_WINDOW_WIDTH,
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SOURCE,
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dst_pitch));
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SMTC_write2Dreg(DE_FOREGROUND,
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FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
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SMTC_write2Dreg(DE_DESTINATION,
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FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
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FIELD_VALUE(0, DE_DESTINATION, X, 1) |
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FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
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SMTC_write2Dreg(DE_DIMENSION,
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FIELD_VALUE(0, DE_DIMENSION, X, 1) |
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FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
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SMTC_write2Dreg(DE_CONTROL,
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FIELD_SET(nCommand, DE_CONTROL, COMMAND,
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SHORT_STROKE));
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}
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/* Generic line */
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else {
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unsigned int k1, k2, et, w;
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if (DeltaX < DeltaY) {
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k1 = 2 * DeltaX;
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et = k1 - DeltaY;
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k2 = et - DeltaY;
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w = DeltaY + 1;
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} else {
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k1 = 2 * DeltaY;
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et = k1 - DeltaX;
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k2 = et - DeltaX;
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w = DeltaX + 1;
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}
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deWaitForNotBusy();
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SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
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FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
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ADDRESS, dst_base));
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SMTC_write2Dreg(DE_PITCH,
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FIELD_VALUE(0, DE_PITCH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0,
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DE_PITCH,
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SOURCE,
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dst_pitch));
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SMTC_write2Dreg(DE_WINDOW_WIDTH,
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FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
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dst_pitch) | FIELD_VALUE(0,
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DE_WINDOW_WIDTH,
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SOURCE,
|
||||
dst_pitch));
|
||||
|
||||
SMTC_write2Dreg(DE_FOREGROUND,
|
||||
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
|
||||
|
||||
SMTC_write2Dreg(DE_SOURCE,
|
||||
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_SOURCE, X_K1, k1) |
|
||||
FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
|
||||
|
||||
SMTC_write2Dreg(DE_DESTINATION,
|
||||
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, X, nX1) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
|
||||
|
||||
SMTC_write2Dreg(DE_DIMENSION,
|
||||
FIELD_VALUE(0, DE_DIMENSION, X, w) |
|
||||
FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
|
||||
|
||||
SMTC_write2Dreg(DE_CONTROL,
|
||||
FIELD_SET(nCommand, DE_CONTROL, COMMAND,
|
||||
LINE_DRAW));
|
||||
}
|
||||
|
||||
smtc_de_busy = 1;
|
||||
}
|
||||
|
||||
void deFillRect(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long dst_X,
|
||||
unsigned long dst_Y,
|
||||
unsigned long dst_width,
|
||||
unsigned long dst_height, unsigned long nColor)
|
||||
{
|
||||
deWaitForNotBusy();
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
|
||||
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
|
||||
dst_base));
|
||||
|
||||
if (dst_pitch) {
|
||||
SMTC_write2Dreg(DE_PITCH,
|
||||
FIELD_VALUE(0, DE_PITCH, DESTINATION,
|
||||
dst_pitch) | FIELD_VALUE(0,
|
||||
DE_PITCH,
|
||||
SOURCE,
|
||||
dst_pitch));
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_WIDTH,
|
||||
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
|
||||
dst_pitch) | FIELD_VALUE(0,
|
||||
DE_WINDOW_WIDTH,
|
||||
SOURCE,
|
||||
dst_pitch));
|
||||
}
|
||||
|
||||
SMTC_write2Dreg(DE_FOREGROUND,
|
||||
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
|
||||
|
||||
SMTC_write2Dreg(DE_DESTINATION,
|
||||
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
|
||||
|
||||
SMTC_write2Dreg(DE_DIMENSION,
|
||||
FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
|
||||
FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
|
||||
|
||||
SMTC_write2Dreg(DE_CONTROL,
|
||||
FIELD_SET(0, DE_CONTROL, STATUS, START) |
|
||||
FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
|
||||
FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
|
||||
FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) |
|
||||
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
|
||||
FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
|
||||
|
||||
smtc_de_busy = 1;
|
||||
}
|
||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* deRotatePattern
|
||||
*
|
||||
* Purpose
|
||||
* Rotate the given pattern if necessary
|
||||
*
|
||||
* Parameters
|
||||
* [in]
|
||||
* pPattern - Pointer to DE_SURFACE structure containing
|
||||
* pattern attributes
|
||||
* patternX - X position (0-7) of pattern origin
|
||||
* patternY - Y position (0-7) of pattern origin
|
||||
*
|
||||
* [out]
|
||||
* pattern_dstaddr - Pointer to pre-allocated buffer containing
|
||||
* rotated pattern
|
||||
*
|
||||
**********************************************************************/
|
||||
void deRotatePattern(unsigned char *pattern_dstaddr,
|
||||
unsigned long pattern_src_addr,
|
||||
unsigned long pattern_BPP,
|
||||
unsigned long pattern_stride, int patternX, int patternY)
|
||||
{
|
||||
unsigned int i;
|
||||
unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT];
|
||||
unsigned int x, y;
|
||||
unsigned char *pjPatByte;
|
||||
|
||||
if (pattern_dstaddr != NULL) {
|
||||
deWaitForNotBusy();
|
||||
|
||||
if (patternX || patternY) {
|
||||
/* Rotate pattern */
|
||||
pjPatByte = (unsigned char *)pattern;
|
||||
|
||||
switch (pattern_BPP) {
|
||||
case 8:
|
||||
{
|
||||
for (y = 0; y < 8; y++) {
|
||||
unsigned char *pjBuffer =
|
||||
pattern_dstaddr +
|
||||
((patternY + y) & 7) * 8;
|
||||
for (x = 0; x < 8; x++) {
|
||||
pjBuffer[(patternX +
|
||||
x) & 7] =
|
||||
pjPatByte[x];
|
||||
}
|
||||
pjPatByte += pattern_stride;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case 16:
|
||||
{
|
||||
for (y = 0; y < 8; y++) {
|
||||
unsigned short *pjBuffer =
|
||||
(unsigned short *)
|
||||
pattern_dstaddr +
|
||||
((patternY + y) & 7) * 8;
|
||||
for (x = 0; x < 8; x++) {
|
||||
pjBuffer[(patternX +
|
||||
x) & 7] =
|
||||
((unsigned short *)
|
||||
pjPatByte)[x];
|
||||
}
|
||||
pjPatByte += pattern_stride;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case 32:
|
||||
{
|
||||
for (y = 0; y < 8; y++) {
|
||||
unsigned long *pjBuffer =
|
||||
(unsigned long *)
|
||||
pattern_dstaddr +
|
||||
((patternY + y) & 7) * 8;
|
||||
for (x = 0; x < 8; x++) {
|
||||
pjBuffer[(patternX +
|
||||
x) & 7] =
|
||||
((unsigned long *)
|
||||
pjPatByte)[x];
|
||||
}
|
||||
pjPatByte += pattern_stride;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/*Don't rotate,just copy pattern into pattern_dstaddr*/
|
||||
for (i = 0; i < (pattern_BPP * 2); i++) {
|
||||
((unsigned long *)pattern_dstaddr)[i] =
|
||||
pattern[i];
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* deCopy
|
||||
*
|
||||
* Purpose
|
||||
* Copy a rectangular area of the source surface to a destination surface
|
||||
*
|
||||
* Remarks
|
||||
* Source bitmap must have the same color depth (BPP) as the destination
|
||||
* bitmap.
|
||||
*
|
||||
**********************************************************************/
|
||||
void deCopy(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long dst_BPP,
|
||||
unsigned long dst_X,
|
||||
unsigned long dst_Y,
|
||||
unsigned long dst_width,
|
||||
unsigned long dst_height,
|
||||
unsigned long src_base,
|
||||
unsigned long src_pitch,
|
||||
unsigned long src_X,
|
||||
unsigned long src_Y, pTransparent pTransp, unsigned char nROP2)
|
||||
{
|
||||
unsigned long nDirection = 0;
|
||||
unsigned long nTransparent = 0;
|
||||
/* Direction of ROP2 operation:
|
||||
* 1 = Left to Right,
|
||||
* (-1) = Right to Left
|
||||
*/
|
||||
unsigned long opSign = 1;
|
||||
/* xWidth is in pixels */
|
||||
unsigned long xWidth = 192 / (dst_BPP / 8);
|
||||
unsigned long de_ctrl = 0;
|
||||
|
||||
deWaitForNotBusy();
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
|
||||
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
|
||||
dst_base));
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE,
|
||||
FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS,
|
||||
src_base));
|
||||
|
||||
if (dst_pitch && src_pitch) {
|
||||
SMTC_write2Dreg(DE_PITCH,
|
||||
FIELD_VALUE(0, DE_PITCH, DESTINATION,
|
||||
dst_pitch) | FIELD_VALUE(0,
|
||||
DE_PITCH,
|
||||
SOURCE,
|
||||
src_pitch));
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_WIDTH,
|
||||
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
|
||||
dst_pitch) | FIELD_VALUE(0,
|
||||
DE_WINDOW_WIDTH,
|
||||
SOURCE,
|
||||
src_pitch));
|
||||
}
|
||||
|
||||
/* Set transparent bits if necessary */
|
||||
if (pTransp != NULL) {
|
||||
nTransparent =
|
||||
pTransp->match | pTransp->select | pTransp->control;
|
||||
|
||||
/* Set color compare register */
|
||||
SMTC_write2Dreg(DE_COLOR_COMPARE,
|
||||
FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR,
|
||||
pTransp->color));
|
||||
}
|
||||
|
||||
/* Determine direction of operation */
|
||||
if (src_Y < dst_Y) {
|
||||
/* +----------+
|
||||
|S |
|
||||
| +----------+
|
||||
| | | |
|
||||
| | | |
|
||||
+---|------+ |
|
||||
| D |
|
||||
+----------+ */
|
||||
|
||||
nDirection = BOTTOM_TO_TOP;
|
||||
} else if (src_Y > dst_Y) {
|
||||
/* +----------+
|
||||
|D |
|
||||
| +----------+
|
||||
| | | |
|
||||
| | | |
|
||||
+---|------+ |
|
||||
| S |
|
||||
+----------+ */
|
||||
|
||||
nDirection = TOP_TO_BOTTOM;
|
||||
} else {
|
||||
/* src_Y == dst_Y */
|
||||
|
||||
if (src_X <= dst_X) {
|
||||
/* +------+---+------+
|
||||
|S | | D|
|
||||
| | | |
|
||||
| | | |
|
||||
| | | |
|
||||
+------+---+------+ */
|
||||
|
||||
nDirection = RIGHT_TO_LEFT;
|
||||
} else {
|
||||
/* src_X > dst_X */
|
||||
|
||||
/* +------+---+------+
|
||||
|D | | S|
|
||||
| | | |
|
||||
| | | |
|
||||
| | | |
|
||||
+------+---+------+ */
|
||||
|
||||
nDirection = LEFT_TO_RIGHT;
|
||||
}
|
||||
}
|
||||
|
||||
if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
|
||||
src_X += dst_width - 1;
|
||||
src_Y += dst_height - 1;
|
||||
dst_X += dst_width - 1;
|
||||
dst_Y += dst_height - 1;
|
||||
opSign = (-1);
|
||||
}
|
||||
|
||||
if (dst_BPP >= 24) {
|
||||
src_X *= 3;
|
||||
src_Y *= 3;
|
||||
dst_X *= 3;
|
||||
dst_Y *= 3;
|
||||
dst_width *= 3;
|
||||
if ((nDirection == BOTTOM_TO_TOP)
|
||||
|| (nDirection == RIGHT_TO_LEFT)) {
|
||||
src_X += 2;
|
||||
dst_X += 2;
|
||||
}
|
||||
}
|
||||
|
||||
/* Workaround for 192 byte hw bug */
|
||||
if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) {
|
||||
/*
|
||||
* Perform the ROP2 operation in chunks of (xWidth *
|
||||
* dst_height)
|
||||
*/
|
||||
while (1) {
|
||||
deWaitForNotBusy();
|
||||
|
||||
SMTC_write2Dreg(DE_SOURCE,
|
||||
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
|
||||
FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
|
||||
|
||||
SMTC_write2Dreg(DE_DESTINATION,
|
||||
FIELD_SET(0, DE_DESTINATION, WRAP,
|
||||
DISABLE) | FIELD_VALUE(0,
|
||||
DE_DESTINATION,
|
||||
X,
|
||||
dst_X)
|
||||
| FIELD_VALUE(0, DE_DESTINATION, Y,
|
||||
dst_Y));
|
||||
|
||||
SMTC_write2Dreg(DE_DIMENSION,
|
||||
FIELD_VALUE(0, DE_DIMENSION, X,
|
||||
xWidth) | FIELD_VALUE(0,
|
||||
DE_DIMENSION,
|
||||
Y_ET,
|
||||
dst_height));
|
||||
|
||||
de_ctrl =
|
||||
FIELD_VALUE(0, DE_CONTROL, ROP,
|
||||
nROP2) | nTransparent | FIELD_SET(0,
|
||||
DE_CONTROL,
|
||||
ROP_SELECT,
|
||||
ROP2)
|
||||
| FIELD_SET(0, DE_CONTROL, COMMAND,
|
||||
BITBLT) | ((nDirection ==
|
||||
1) ? FIELD_SET(0,
|
||||
DE_CONTROL,
|
||||
DIRECTION,
|
||||
RIGHT_TO_LEFT)
|
||||
: FIELD_SET(0, DE_CONTROL,
|
||||
DIRECTION,
|
||||
LEFT_TO_RIGHT)) |
|
||||
FIELD_SET(0, DE_CONTROL, STATUS, START);
|
||||
|
||||
SMTC_write2Dreg(DE_CONTROL, de_ctrl);
|
||||
|
||||
src_X += (opSign * xWidth);
|
||||
dst_X += (opSign * xWidth);
|
||||
dst_width -= xWidth;
|
||||
|
||||
if (dst_width <= 0) {
|
||||
/* ROP2 operation is complete */
|
||||
break;
|
||||
}
|
||||
|
||||
if (xWidth > dst_width)
|
||||
xWidth = dst_width;
|
||||
}
|
||||
} else {
|
||||
deWaitForNotBusy();
|
||||
SMTC_write2Dreg(DE_SOURCE,
|
||||
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
|
||||
FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
|
||||
|
||||
SMTC_write2Dreg(DE_DESTINATION,
|
||||
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
|
||||
|
||||
SMTC_write2Dreg(DE_DIMENSION,
|
||||
FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
|
||||
FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
|
||||
|
||||
de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
|
||||
nTransparent |
|
||||
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
|
||||
FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
|
||||
((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION,
|
||||
RIGHT_TO_LEFT)
|
||||
: FIELD_SET(0, DE_CONTROL, DIRECTION,
|
||||
LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL,
|
||||
STATUS, START);
|
||||
SMTC_write2Dreg(DE_CONTROL, de_ctrl);
|
||||
}
|
||||
|
||||
smtc_de_busy = 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function sets the pixel format that will apply to the 2D Engine.
|
||||
*/
|
||||
void deSetPixelFormat(unsigned long bpp)
|
||||
{
|
||||
unsigned long de_format;
|
||||
|
||||
de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT);
|
||||
|
||||
switch (bpp) {
|
||||
case 8:
|
||||
de_format =
|
||||
FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8);
|
||||
break;
|
||||
default:
|
||||
case 16:
|
||||
de_format =
|
||||
FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16);
|
||||
break;
|
||||
case 32:
|
||||
de_format =
|
||||
FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32);
|
||||
break;
|
||||
}
|
||||
|
||||
SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format);
|
||||
}
|
||||
|
||||
/*
|
||||
* System memory to Video memory monochrome expansion.
|
||||
*
|
||||
* Source is monochrome image in system memory. This function expands the
|
||||
* monochrome data to color image in video memory.
|
||||
*/
|
||||
|
||||
long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf,
|
||||
long srcDelta,
|
||||
unsigned long startBit,
|
||||
unsigned long dBase,
|
||||
unsigned long dPitch,
|
||||
unsigned long bpp,
|
||||
unsigned long dx, unsigned long dy,
|
||||
unsigned long width, unsigned long height,
|
||||
unsigned long fColor,
|
||||
unsigned long bColor,
|
||||
unsigned long rop2) {
|
||||
unsigned long bytePerPixel;
|
||||
unsigned long ulBytesPerScan;
|
||||
unsigned long ul4BytesPerScan;
|
||||
unsigned long ulBytesRemain;
|
||||
unsigned long de_ctrl = 0;
|
||||
unsigned char ajRemain[4];
|
||||
long i, j;
|
||||
|
||||
bytePerPixel = bpp / 8;
|
||||
|
||||
/* Just make sure the start bit is within legal range */
|
||||
startBit &= 7;
|
||||
|
||||
ulBytesPerScan = (width + startBit + 7) / 8;
|
||||
ul4BytesPerScan = ulBytesPerScan & ~3;
|
||||
ulBytesRemain = ulBytesPerScan & 3;
|
||||
|
||||
if (smtc_de_busy)
|
||||
deWaitForNotBusy();
|
||||
|
||||
/*
|
||||
* 2D Source Base. Use 0 for HOST Blt.
|
||||
*/
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
|
||||
|
||||
/*
|
||||
* 2D Destination Base.
|
||||
*
|
||||
* It is an address offset (128 bit aligned) from the beginning of
|
||||
* frame buffer.
|
||||
*/
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
|
||||
|
||||
if (dPitch) {
|
||||
|
||||
/*
|
||||
* Program pitch (distance between the 1st points of two
|
||||
* adjacent lines).
|
||||
*
|
||||
* Note that input pitch is BYTE value, but the 2D Pitch
|
||||
* register uses pixel values. Need Byte to pixel convertion.
|
||||
*/
|
||||
|
||||
SMTC_write2Dreg(DE_PITCH,
|
||||
FIELD_VALUE(0, DE_PITCH, DESTINATION,
|
||||
dPitch /
|
||||
bytePerPixel) | FIELD_VALUE(0,
|
||||
DE_PITCH,
|
||||
SOURCE,
|
||||
dPitch /
|
||||
bytePerPixel));
|
||||
|
||||
/* Screen Window width in Pixels.
|
||||
*
|
||||
* 2D engine uses this value to calculate the linear address in
|
||||
* frame buffer for a given point.
|
||||
*/
|
||||
|
||||
SMTC_write2Dreg(DE_WINDOW_WIDTH,
|
||||
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
|
||||
(dPitch /
|
||||
bytePerPixel)) | FIELD_VALUE(0,
|
||||
DE_WINDOW_WIDTH,
|
||||
SOURCE,
|
||||
(dPitch
|
||||
/
|
||||
bytePerPixel)));
|
||||
}
|
||||
/* Note: For 2D Source in Host Write, only X_K1 field is needed, and
|
||||
* Y_K2 field is not used. For mono bitmap, use startBit for X_K1.
|
||||
*/
|
||||
|
||||
SMTC_write2Dreg(DE_SOURCE,
|
||||
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
|
||||
FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
|
||||
|
||||
SMTC_write2Dreg(DE_DESTINATION,
|
||||
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, X, dx) |
|
||||
FIELD_VALUE(0, DE_DESTINATION, Y, dy));
|
||||
|
||||
SMTC_write2Dreg(DE_DIMENSION,
|
||||
FIELD_VALUE(0, DE_DIMENSION, X, width) |
|
||||
FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
|
||||
|
||||
SMTC_write2Dreg(DE_FOREGROUND, fColor);
|
||||
SMTC_write2Dreg(DE_BACKGROUND, bColor);
|
||||
|
||||
if (bpp)
|
||||
deSetPixelFormat(bpp);
|
||||
/* Set the pixel format of the destination */
|
||||
|
||||
de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
|
||||
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
|
||||
FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
|
||||
FIELD_SET(0, DE_CONTROL, HOST, MONO) |
|
||||
FIELD_SET(0, DE_CONTROL, STATUS, START);
|
||||
|
||||
SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
|
||||
|
||||
/* Write MONO data (line by line) to 2D Engine data port */
|
||||
for (i = 0; i < height; i++) {
|
||||
/* For each line, send the data in chunks of 4 bytes */
|
||||
for (j = 0; j < (ul4BytesPerScan / 4); j++)
|
||||
SMTC_write2Ddataport(0,
|
||||
*(unsigned long *)(pSrcbuf +
|
||||
(j * 4)));
|
||||
|
||||
if (ulBytesRemain) {
|
||||
memcpy(ajRemain, pSrcbuf + ul4BytesPerScan,
|
||||
ulBytesRemain);
|
||||
SMTC_write2Ddataport(0, *(unsigned long *)ajRemain);
|
||||
}
|
||||
|
||||
pSrcbuf += srcDelta;
|
||||
}
|
||||
smtc_de_busy = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function gets the transparency status from DE_CONTROL register.
|
||||
* It returns a double word with the transparent fields properly set,
|
||||
* while other fields are 0.
|
||||
*/
|
||||
unsigned long deGetTransparency(void)
|
||||
{
|
||||
unsigned long de_ctrl;
|
||||
|
||||
de_ctrl = SMTC_read2Dreg(DE_CONTROL);
|
||||
|
||||
de_ctrl &=
|
||||
FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
|
||||
FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT) |
|
||||
FIELD_MASK(DE_CONTROL_TRANSPARENCY);
|
||||
|
||||
return de_ctrl;
|
||||
}
|
||||
530
drivers/staging/sm7xx/smtc2d.h
Normal file
530
drivers/staging/sm7xx/smtc2d.h
Normal file
@ -0,0 +1,530 @@
|
||||
/*
|
||||
* Silicon Motion SM712 2D drawing engine functions.
|
||||
*
|
||||
* Copyright (C) 2006 Silicon Motion Technology Corp.
|
||||
* Author: Ge Wang, gewang@siliconmotion.com
|
||||
*
|
||||
* Copyright (C) 2009 Lemote, Inc.
|
||||
* Author: Wu Zhangjin, wuzj@lemote.com
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file COPYING in the main directory of this archive for
|
||||
* more details.
|
||||
*/
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL 0
|
||||
#endif
|
||||
|
||||
/* Internal macros */
|
||||
|
||||
#define _F_START(f) (0 ? f)
|
||||
#define _F_END(f) (1 ? f)
|
||||
#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
|
||||
#define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
|
||||
#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
|
||||
#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
|
||||
|
||||
/* Global macros */
|
||||
|
||||
#define FIELD_GET(x, reg, field) \
|
||||
( \
|
||||
_F_NORMALIZE((x), reg ## _ ## field) \
|
||||
)
|
||||
|
||||
#define FIELD_SET(x, reg, field, value) \
|
||||
( \
|
||||
(x & ~_F_MASK(reg ## _ ## field)) \
|
||||
| _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
|
||||
)
|
||||
|
||||
#define FIELD_VALUE(x, reg, field, value) \
|
||||
( \
|
||||
(x & ~_F_MASK(reg ## _ ## field)) \
|
||||
| _F_DENORMALIZE(value, reg ## _ ## field) \
|
||||
)
|
||||
|
||||
#define FIELD_CLEAR(reg, field) \
|
||||
( \
|
||||
~_F_MASK(reg ## _ ## field) \
|
||||
)
|
||||
|
||||
/* Field Macros */
|
||||
|
||||
#define FIELD_START(field) (0 ? field)
|
||||
#define FIELD_END(field) (1 ? field)
|
||||
#define FIELD_SIZE(field) \
|
||||
(1 + FIELD_END(field) - FIELD_START(field))
|
||||
|
||||
#define FIELD_MASK(field) \
|
||||
(((1 << (FIELD_SIZE(field)-1)) \
|
||||
| ((1 << (FIELD_SIZE(field)-1)) - 1)) \
|
||||
<< FIELD_START(field))
|
||||
|
||||
#define FIELD_NORMALIZE(reg, field) \
|
||||
(((reg) & FIELD_MASK(field)) >> FIELD_START(field))
|
||||
|
||||
#define FIELD_DENORMALIZE(field, value) \
|
||||
(((value) << FIELD_START(field)) & FIELD_MASK(field))
|
||||
|
||||
#define FIELD_INIT(reg, field, value) \
|
||||
FIELD_DENORMALIZE(reg ## _ ## field, \
|
||||
reg ## _ ## field ## _ ## value)
|
||||
|
||||
#define FIELD_INIT_VAL(reg, field, value) \
|
||||
(FIELD_DENORMALIZE(reg ## _ ## field, value))
|
||||
|
||||
#define FIELD_VAL_SET(x, r, f, v) ({ \
|
||||
x = (x & ~FIELD_MASK(r ## _ ## f)) \
|
||||
| FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) \
|
||||
})
|
||||
|
||||
#define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b)))
|
||||
|
||||
/* Transparent info definition */
|
||||
typedef struct {
|
||||
unsigned long match; /* Matching pixel is OPAQUE/TRANSPARENT */
|
||||
unsigned long select; /* Transparency controlled by SRC/DST */
|
||||
unsigned long control; /* ENABLE/DISABLE transparency */
|
||||
unsigned long color; /* Transparent color */
|
||||
} Transparent, *pTransparent;
|
||||
|
||||
#define PIXEL_DEPTH_1_BP 0 /* 1 bit per pixel */
|
||||
#define PIXEL_DEPTH_8_BPP 1 /* 8 bits per pixel */
|
||||
#define PIXEL_DEPTH_16_BPP 2 /* 16 bits per pixel */
|
||||
#define PIXEL_DEPTH_32_BPP 3 /* 32 bits per pixel */
|
||||
#define PIXEL_DEPTH_YUV422 8 /* 16 bits per pixel YUV422 */
|
||||
#define PIXEL_DEPTH_YUV420 9 /* 16 bits per pixel YUV420 */
|
||||
|
||||
#define PATTERN_WIDTH 8
|
||||
#define PATTERN_HEIGHT 8
|
||||
|
||||
#define TOP_TO_BOTTOM 0
|
||||
#define BOTTOM_TO_TOP 1
|
||||
#define RIGHT_TO_LEFT BOTTOM_TO_TOP
|
||||
#define LEFT_TO_RIGHT TOP_TO_BOTTOM
|
||||
|
||||
/* Constants used in Transparent structure */
|
||||
#define MATCH_OPAQUE 0x00000000
|
||||
#define MATCH_TRANSPARENT 0x00000400
|
||||
#define SOURCE 0x00000000
|
||||
#define DESTINATION 0x00000200
|
||||
|
||||
/* 2D registers. */
|
||||
|
||||
#define DE_SOURCE 0x000000
|
||||
#define DE_SOURCE_WRAP 31 : 31
|
||||
#define DE_SOURCE_WRAP_DISABLE 0
|
||||
#define DE_SOURCE_WRAP_ENABLE 1
|
||||
#define DE_SOURCE_X_K1 29 : 16
|
||||
#define DE_SOURCE_Y_K2 15 : 0
|
||||
|
||||
#define DE_DESTINATION 0x000004
|
||||
#define DE_DESTINATION_WRAP 31 : 31
|
||||
#define DE_DESTINATION_WRAP_DISABLE 0
|
||||
#define DE_DESTINATION_WRAP_ENABLE 1
|
||||
#define DE_DESTINATION_X 28 : 16
|
||||
#define DE_DESTINATION_Y 15 : 0
|
||||
|
||||
#define DE_DIMENSION 0x000008
|
||||
#define DE_DIMENSION_X 28 : 16
|
||||
#define DE_DIMENSION_Y_ET 15 : 0
|
||||
|
||||
#define DE_CONTROL 0x00000C
|
||||
#define DE_CONTROL_STATUS 31 : 31
|
||||
#define DE_CONTROL_STATUS_STOP 0
|
||||
#define DE_CONTROL_STATUS_START 1
|
||||
#define DE_CONTROL_PATTERN 30 : 30
|
||||
#define DE_CONTROL_PATTERN_MONO 0
|
||||
#define DE_CONTROL_PATTERN_COLOR 1
|
||||
#define DE_CONTROL_UPDATE_DESTINATION_X 29 : 29
|
||||
#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
|
||||
#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
|
||||
#define DE_CONTROL_QUICK_START 28 : 28
|
||||
#define DE_CONTROL_QUICK_START_DISABLE 0
|
||||
#define DE_CONTROL_QUICK_START_ENABLE 1
|
||||
#define DE_CONTROL_DIRECTION 27 : 27
|
||||
#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
|
||||
#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
|
||||
#define DE_CONTROL_MAJOR 26 : 26
|
||||
#define DE_CONTROL_MAJOR_X 0
|
||||
#define DE_CONTROL_MAJOR_Y 1
|
||||
#define DE_CONTROL_STEP_X 25 : 25
|
||||
#define DE_CONTROL_STEP_X_POSITIVE 1
|
||||
#define DE_CONTROL_STEP_X_NEGATIVE 0
|
||||
#define DE_CONTROL_STEP_Y 24 : 24
|
||||
#define DE_CONTROL_STEP_Y_POSITIVE 1
|
||||
#define DE_CONTROL_STEP_Y_NEGATIVE 0
|
||||
#define DE_CONTROL_STRETCH 23 : 23
|
||||
#define DE_CONTROL_STRETCH_DISABLE 0
|
||||
#define DE_CONTROL_STRETCH_ENABLE 1
|
||||
#define DE_CONTROL_HOST 22 : 22
|
||||
#define DE_CONTROL_HOST_COLOR 0
|
||||
#define DE_CONTROL_HOST_MONO 1
|
||||
#define DE_CONTROL_LAST_PIXEL 21 : 21
|
||||
#define DE_CONTROL_LAST_PIXEL_OFF 0
|
||||
#define DE_CONTROL_LAST_PIXEL_ON 1
|
||||
#define DE_CONTROL_COMMAND 20 : 16
|
||||
#define DE_CONTROL_COMMAND_BITBLT 0
|
||||
#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
|
||||
#define DE_CONTROL_COMMAND_DE_TILE 2
|
||||
#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
|
||||
#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
|
||||
#define DE_CONTROL_COMMAND_RLE_STRIP 5
|
||||
#define DE_CONTROL_COMMAND_SHORT_STROKE 6
|
||||
#define DE_CONTROL_COMMAND_LINE_DRAW 7
|
||||
#define DE_CONTROL_COMMAND_HOST_WRITE 8
|
||||
#define DE_CONTROL_COMMAND_HOST_READ 9
|
||||
#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
|
||||
#define DE_CONTROL_COMMAND_ROTATE 11
|
||||
#define DE_CONTROL_COMMAND_FONT 12
|
||||
#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
|
||||
#define DE_CONTROL_ROP_SELECT 15 : 15
|
||||
#define DE_CONTROL_ROP_SELECT_ROP3 0
|
||||
#define DE_CONTROL_ROP_SELECT_ROP2 1
|
||||
#define DE_CONTROL_ROP2_SOURCE 14 : 14
|
||||
#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
|
||||
#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
|
||||
#define DE_CONTROL_MONO_DATA 13 : 12
|
||||
#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
|
||||
#define DE_CONTROL_MONO_DATA_8_PACKED 1
|
||||
#define DE_CONTROL_MONO_DATA_16_PACKED 2
|
||||
#define DE_CONTROL_MONO_DATA_32_PACKED 3
|
||||
#define DE_CONTROL_REPEAT_ROTATE 11 : 11
|
||||
#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
|
||||
#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
|
||||
#define DE_CONTROL_TRANSPARENCY_MATCH 10 : 10
|
||||
#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
|
||||
#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
|
||||
#define DE_CONTROL_TRANSPARENCY_SELECT 9 : 9
|
||||
#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
|
||||
#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
|
||||
#define DE_CONTROL_TRANSPARENCY 8 : 8
|
||||
#define DE_CONTROL_TRANSPARENCY_DISABLE 0
|
||||
#define DE_CONTROL_TRANSPARENCY_ENABLE 1
|
||||
#define DE_CONTROL_ROP 7 : 0
|
||||
|
||||
/* Pseudo fields. */
|
||||
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR 27 : 24
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_225 0
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_135 1
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_315 2
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_45 3
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_270 4
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_90 5
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_180 8
|
||||
#define DE_CONTROL_SHORT_STROKE_DIR_0 10
|
||||
#define DE_CONTROL_ROTATION 25 : 24
|
||||
#define DE_CONTROL_ROTATION_0 0
|
||||
#define DE_CONTROL_ROTATION_270 1
|
||||
#define DE_CONTROL_ROTATION_90 2
|
||||
#define DE_CONTROL_ROTATION_180 3
|
||||
|
||||
#define DE_PITCH 0x000010
|
||||
#define DE_PITCH_DESTINATION 28 : 16
|
||||
#define DE_PITCH_SOURCE 12 : 0
|
||||
|
||||
#define DE_FOREGROUND 0x000014
|
||||
#define DE_FOREGROUND_COLOR 31 : 0
|
||||
|
||||
#define DE_BACKGROUND 0x000018
|
||||
#define DE_BACKGROUND_COLOR 31 : 0
|
||||
|
||||
#define DE_STRETCH_FORMAT 0x00001C
|
||||
#define DE_STRETCH_FORMAT_PATTERN_XY 30 : 30
|
||||
#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
|
||||
#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
|
||||
#define DE_STRETCH_FORMAT_PATTERN_Y 29 : 27
|
||||
#define DE_STRETCH_FORMAT_PATTERN_X 25 : 23
|
||||
#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21 : 20
|
||||
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
|
||||
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
|
||||
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
|
||||
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
|
||||
#define DE_STRETCH_FORMAT_ADDRESSING 19 : 16
|
||||
#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
|
||||
#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
|
||||
#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11 : 0
|
||||
|
||||
#define DE_COLOR_COMPARE 0x000020
|
||||
#define DE_COLOR_COMPARE_COLOR 23 : 0
|
||||
|
||||
#define DE_COLOR_COMPARE_MASK 0x000024
|
||||
#define DE_COLOR_COMPARE_MASK_MASKS 23 : 0
|
||||
|
||||
#define DE_MASKS 0x000028
|
||||
#define DE_MASKS_BYTE_MASK 31 : 16
|
||||
#define DE_MASKS_BIT_MASK 15 : 0
|
||||
|
||||
#define DE_CLIP_TL 0x00002C
|
||||
#define DE_CLIP_TL_TOP 31 : 16
|
||||
#define DE_CLIP_TL_STATUS 13 : 13
|
||||
#define DE_CLIP_TL_STATUS_DISABLE 0
|
||||
#define DE_CLIP_TL_STATUS_ENABLE 1
|
||||
#define DE_CLIP_TL_INHIBIT 12 : 12
|
||||
#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
|
||||
#define DE_CLIP_TL_INHIBIT_INSIDE 1
|
||||
#define DE_CLIP_TL_LEFT 11 : 0
|
||||
|
||||
#define DE_CLIP_BR 0x000030
|
||||
#define DE_CLIP_BR_BOTTOM 31 : 16
|
||||
#define DE_CLIP_BR_RIGHT 12 : 0
|
||||
|
||||
#define DE_MONO_PATTERN_LOW 0x000034
|
||||
#define DE_MONO_PATTERN_LOW_PATTERN 31 : 0
|
||||
|
||||
#define DE_MONO_PATTERN_HIGH 0x000038
|
||||
#define DE_MONO_PATTERN_HIGH_PATTERN 31 : 0
|
||||
|
||||
#define DE_WINDOW_WIDTH 0x00003C
|
||||
#define DE_WINDOW_WIDTH_DESTINATION 28 : 16
|
||||
#define DE_WINDOW_WIDTH_SOURCE 12 : 0
|
||||
|
||||
#define DE_WINDOW_SOURCE_BASE 0x000040
|
||||
#define DE_WINDOW_SOURCE_BASE_EXT 27 : 27
|
||||
#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
|
||||
#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
|
||||
#define DE_WINDOW_SOURCE_BASE_CS 26 : 26
|
||||
#define DE_WINDOW_SOURCE_BASE_CS_0 0
|
||||
#define DE_WINDOW_SOURCE_BASE_CS_1 1
|
||||
#define DE_WINDOW_SOURCE_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define DE_WINDOW_DESTINATION_BASE 0x000044
|
||||
#define DE_WINDOW_DESTINATION_BASE_EXT 27 : 27
|
||||
#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
|
||||
#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
|
||||
#define DE_WINDOW_DESTINATION_BASE_CS 26 : 26
|
||||
#define DE_WINDOW_DESTINATION_BASE_CS_0 0
|
||||
#define DE_WINDOW_DESTINATION_BASE_CS_1 1
|
||||
#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define DE_ALPHA 0x000048
|
||||
#define DE_ALPHA_VALUE 7 : 0
|
||||
|
||||
#define DE_WRAP 0x00004C
|
||||
#define DE_WRAP_X 31 : 16
|
||||
#define DE_WRAP_Y 15 : 0
|
||||
|
||||
#define DE_STATUS 0x000050
|
||||
#define DE_STATUS_CSC 1 : 1
|
||||
#define DE_STATUS_CSC_CLEAR 0
|
||||
#define DE_STATUS_CSC_NOT_ACTIVE 0
|
||||
#define DE_STATUS_CSC_ACTIVE 1
|
||||
#define DE_STATUS_2D 0 : 0
|
||||
#define DE_STATUS_2D_CLEAR 0
|
||||
#define DE_STATUS_2D_NOT_ACTIVE 0
|
||||
#define DE_STATUS_2D_ACTIVE 1
|
||||
|
||||
/* Color Space Conversion registers. */
|
||||
|
||||
#define CSC_Y_SOURCE_BASE 0x0000C8
|
||||
#define CSC_Y_SOURCE_BASE_EXT 27 : 27
|
||||
#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
|
||||
#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
|
||||
#define CSC_Y_SOURCE_BASE_CS 26 : 26
|
||||
#define CSC_Y_SOURCE_BASE_CS_0 0
|
||||
#define CSC_Y_SOURCE_BASE_CS_1 1
|
||||
#define CSC_Y_SOURCE_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define CSC_CONSTANTS 0x0000CC
|
||||
#define CSC_CONSTANTS_Y 31 : 24
|
||||
#define CSC_CONSTANTS_R 23 : 16
|
||||
#define CSC_CONSTANTS_G 15 : 8
|
||||
#define CSC_CONSTANTS_B 7 : 0
|
||||
|
||||
#define CSC_Y_SOURCE_X 0x0000D0
|
||||
#define CSC_Y_SOURCE_X_INTEGER 26 : 16
|
||||
#define CSC_Y_SOURCE_X_FRACTION 15 : 3
|
||||
|
||||
#define CSC_Y_SOURCE_Y 0x0000D4
|
||||
#define CSC_Y_SOURCE_Y_INTEGER 27 : 16
|
||||
#define CSC_Y_SOURCE_Y_FRACTION 15 : 3
|
||||
|
||||
#define CSC_U_SOURCE_BASE 0x0000D8
|
||||
#define CSC_U_SOURCE_BASE_EXT 27 : 27
|
||||
#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
|
||||
#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
|
||||
#define CSC_U_SOURCE_BASE_CS 26 : 26
|
||||
#define CSC_U_SOURCE_BASE_CS_0 0
|
||||
#define CSC_U_SOURCE_BASE_CS_1 1
|
||||
#define CSC_U_SOURCE_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define CSC_V_SOURCE_BASE 0x0000DC
|
||||
#define CSC_V_SOURCE_BASE_EXT 27 : 27
|
||||
#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
|
||||
#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
|
||||
#define CSC_V_SOURCE_BASE_CS 26 : 26
|
||||
#define CSC_V_SOURCE_BASE_CS_0 0
|
||||
#define CSC_V_SOURCE_BASE_CS_1 1
|
||||
#define CSC_V_SOURCE_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define CSC_SOURCE_DIMENSION 0x0000E0
|
||||
#define CSC_SOURCE_DIMENSION_X 31 : 16
|
||||
#define CSC_SOURCE_DIMENSION_Y 15 : 0
|
||||
|
||||
#define CSC_SOURCE_PITCH 0x0000E4
|
||||
#define CSC_SOURCE_PITCH_Y 31 : 16
|
||||
#define CSC_SOURCE_PITCH_UV 15 : 0
|
||||
|
||||
#define CSC_DESTINATION 0x0000E8
|
||||
#define CSC_DESTINATION_WRAP 31 : 31
|
||||
#define CSC_DESTINATION_WRAP_DISABLE 0
|
||||
#define CSC_DESTINATION_WRAP_ENABLE 1
|
||||
#define CSC_DESTINATION_X 27 : 16
|
||||
#define CSC_DESTINATION_Y 11 : 0
|
||||
|
||||
#define CSC_DESTINATION_DIMENSION 0x0000EC
|
||||
#define CSC_DESTINATION_DIMENSION_X 31 : 16
|
||||
#define CSC_DESTINATION_DIMENSION_Y 15 : 0
|
||||
|
||||
#define CSC_DESTINATION_PITCH 0x0000F0
|
||||
#define CSC_DESTINATION_PITCH_X 31 : 16
|
||||
#define CSC_DESTINATION_PITCH_Y 15 : 0
|
||||
|
||||
#define CSC_SCALE_FACTOR 0x0000F4
|
||||
#define CSC_SCALE_FACTOR_HORIZONTAL 31 : 16
|
||||
#define CSC_SCALE_FACTOR_VERTICAL 15 : 0
|
||||
|
||||
#define CSC_DESTINATION_BASE 0x0000F8
|
||||
#define CSC_DESTINATION_BASE_EXT 27 : 27
|
||||
#define CSC_DESTINATION_BASE_EXT_LOCAL 0
|
||||
#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
|
||||
#define CSC_DESTINATION_BASE_CS 26 : 26
|
||||
#define CSC_DESTINATION_BASE_CS_0 0
|
||||
#define CSC_DESTINATION_BASE_CS_1 1
|
||||
#define CSC_DESTINATION_BASE_ADDRESS 25 : 0
|
||||
|
||||
#define CSC_CONTROL 0x0000FC
|
||||
#define CSC_CONTROL_STATUS 31 : 31
|
||||
#define CSC_CONTROL_STATUS_STOP 0
|
||||
#define CSC_CONTROL_STATUS_START 1
|
||||
#define CSC_CONTROL_SOURCE_FORMAT 30 : 28
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
|
||||
#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
|
||||
#define CSC_CONTROL_DESTINATION_FORMAT 27 : 26
|
||||
#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
|
||||
#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
|
||||
#define CSC_CONTROL_HORIZONTAL_FILTER 25 : 25
|
||||
#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
|
||||
#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
|
||||
#define CSC_CONTROL_VERTICAL_FILTER 24 : 24
|
||||
#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
|
||||
#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
|
||||
#define CSC_CONTROL_BYTE_ORDER 23 : 23
|
||||
#define CSC_CONTROL_BYTE_ORDER_YUYV 0
|
||||
#define CSC_CONTROL_BYTE_ORDER_UYVY 1
|
||||
|
||||
#define DE_DATA_PORT_501 0x110000
|
||||
#define DE_DATA_PORT_712 0x400000
|
||||
#define DE_DATA_PORT_722 0x6000
|
||||
|
||||
/* point to virtual Memory Map IO starting address */
|
||||
extern char *smtc_RegBaseAddress;
|
||||
/* point to virtual video memory starting address */
|
||||
extern char *smtc_VRAMBaseAddress;
|
||||
extern unsigned char smtc_de_busy;
|
||||
|
||||
extern unsigned long memRead32(unsigned long nOffset);
|
||||
extern void memWrite32(unsigned long nOffset, unsigned long nData);
|
||||
extern unsigned long SMTC_read2Dreg(unsigned long nOffset);
|
||||
|
||||
/* 2D functions */
|
||||
extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
|
||||
unsigned int bpp);
|
||||
|
||||
extern void deWaitForNotBusy(void);
|
||||
|
||||
extern void deVerticalLine(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long nX,
|
||||
unsigned long nY,
|
||||
unsigned long dst_height,
|
||||
unsigned long nColor);
|
||||
|
||||
extern void deHorizontalLine(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long nX,
|
||||
unsigned long nY,
|
||||
unsigned long dst_width,
|
||||
unsigned long nColor);
|
||||
|
||||
extern void deLine(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long nX1,
|
||||
unsigned long nY1,
|
||||
unsigned long nX2,
|
||||
unsigned long nY2,
|
||||
unsigned long nColor);
|
||||
|
||||
extern void deFillRect(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long dst_X,
|
||||
unsigned long dst_Y,
|
||||
unsigned long dst_width,
|
||||
unsigned long dst_height,
|
||||
unsigned long nColor);
|
||||
|
||||
extern void deRotatePattern(unsigned char *pattern_dstaddr,
|
||||
unsigned long pattern_src_addr,
|
||||
unsigned long pattern_BPP,
|
||||
unsigned long pattern_stride,
|
||||
int patternX,
|
||||
int patternY);
|
||||
|
||||
extern void deCopy(unsigned long dst_base,
|
||||
unsigned long dst_pitch,
|
||||
unsigned long dst_BPP,
|
||||
unsigned long dst_X,
|
||||
unsigned long dst_Y,
|
||||
unsigned long dst_width,
|
||||
unsigned long dst_height,
|
||||
unsigned long src_base,
|
||||
unsigned long src_pitch,
|
||||
unsigned long src_X,
|
||||
unsigned long src_Y,
|
||||
pTransparent pTransp,
|
||||
unsigned char nROP2);
|
||||
|
||||
/*
|
||||
* System memory to Video memory monochrome expansion.
|
||||
*
|
||||
* Source is monochrome image in system memory. This function expands the
|
||||
* monochrome data to color image in video memory.
|
||||
*
|
||||
* @pSrcbuf: pointer to start of source buffer in system memory
|
||||
* @srcDelta: Pitch value (in bytes) of the source buffer, +ive means top
|
||||
* down and -ive mean button up
|
||||
* @startBit: Mono data can start at any bit in a byte, this value should
|
||||
* be 0 to 7
|
||||
* @dBase: Address of destination : offset in frame buffer
|
||||
* @dPitch: Pitch value of destination surface in BYTE
|
||||
* @bpp: Color depth of destination surface
|
||||
* @dx, dy: Starting coordinate of destination surface
|
||||
* @width, height: width and height of rectange in pixel value
|
||||
* @fColor,bColor: Foreground, Background color (corresponding to a 1, 0 in
|
||||
* the monochrome data)
|
||||
* @rop2: ROP value
|
||||
*/
|
||||
|
||||
extern long deSystemMem2VideoMemMonoBlt(
|
||||
const char *pSrcbuf,
|
||||
long srcDelta,
|
||||
unsigned long startBit,
|
||||
unsigned long dBase,
|
||||
unsigned long dPitch,
|
||||
unsigned long bpp,
|
||||
unsigned long dx, unsigned long dy,
|
||||
unsigned long width, unsigned long height,
|
||||
unsigned long fColor,
|
||||
unsigned long bColor,
|
||||
unsigned long rop2);
|
||||
|
||||
extern unsigned long deGetTransparency(void);
|
||||
extern void deSetPixelFormat(unsigned long bpp);
|
||||
1253
drivers/staging/sm7xx/smtcfb.c
Normal file
1253
drivers/staging/sm7xx/smtcfb.c
Normal file
File diff suppressed because it is too large
Load Diff
793
drivers/staging/sm7xx/smtcfb.h
Normal file
793
drivers/staging/sm7xx/smtcfb.h
Normal file
@ -0,0 +1,793 @@
|
||||
/*
|
||||
* Silicon Motion SM712 frame buffer device
|
||||
*
|
||||
* Copyright (C) 2006 Silicon Motion Technology Corp.
|
||||
* Authors: Ge Wang, gewang@siliconmotion.com
|
||||
* Boyod boyod.yang@siliconmotion.com.cn
|
||||
*
|
||||
* Copyright (C) 2009 Lemote, Inc.
|
||||
* Author: Wu Zhangjin, wuzj@lemote.com
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file COPYING in the main directory of this archive for
|
||||
* more details.
|
||||
*/
|
||||
|
||||
#define SMTC_LINUX_FB_VERSION "version 0.11.2619.21.01 July 27, 2008"
|
||||
|
||||
#define NR_PALETTE 256
|
||||
#define NR_RGB 2
|
||||
|
||||
#define FB_ACCEL_SMI_LYNX 88
|
||||
|
||||
#ifdef __BIG_ENDIAN
|
||||
#define PC_VGA 0
|
||||
#else
|
||||
#define PC_VGA 1
|
||||
#endif
|
||||
|
||||
#define SCREEN_X_RES 1024
|
||||
#define SCREEN_Y_RES 600
|
||||
#define SCREEN_BPP 16
|
||||
|
||||
#ifndef FIELD_OFFSET
|
||||
#define FIELD_OFSFET(type, field) \
|
||||
((unsigned long) (PUCHAR) & (((type *)0)->field))
|
||||
#endif
|
||||
|
||||
/*Assume SM712 graphics chip has 4MB VRAM */
|
||||
#define SM712_VIDEOMEMORYSIZE 0x00400000
|
||||
/*Assume SM722 graphics chip has 8MB VRAM */
|
||||
#define SM722_VIDEOMEMORYSIZE 0x00800000
|
||||
|
||||
#define dac_reg (0x3c8)
|
||||
#define dac_val (0x3c9)
|
||||
|
||||
extern char *smtc_RegBaseAddress;
|
||||
#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
|
||||
#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
|
||||
#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
|
||||
|
||||
#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
|
||||
#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
|
||||
#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
|
||||
|
||||
#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
|
||||
#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
|
||||
#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
|
||||
#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
|
||||
#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
|
||||
#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
|
||||
#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
|
||||
#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
|
||||
#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
|
||||
#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
|
||||
#define SIZE_VPR (0x6C + 1)
|
||||
#define SIZE_DPR (0x44 + 1)
|
||||
|
||||
static inline void smtc_crtcw(int reg, int val)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3d4);
|
||||
smtc_mmiowb(val, 0x3d5);
|
||||
}
|
||||
|
||||
static inline unsigned int smtc_crtcr(int reg)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3d4);
|
||||
return smtc_mmiorb(0x3d5);
|
||||
}
|
||||
|
||||
static inline void smtc_grphw(int reg, int val)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3ce);
|
||||
smtc_mmiowb(val, 0x3cf);
|
||||
}
|
||||
|
||||
static inline unsigned int smtc_grphr(int reg)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3ce);
|
||||
return smtc_mmiorb(0x3cf);
|
||||
}
|
||||
|
||||
static inline void smtc_attrw(int reg, int val)
|
||||
{
|
||||
smtc_mmiorb(0x3da);
|
||||
smtc_mmiowb(reg, 0x3c0);
|
||||
smtc_mmiorb(0x3c1);
|
||||
smtc_mmiowb(val, 0x3c0);
|
||||
}
|
||||
|
||||
static inline void smtc_seqw(int reg, int val)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3c4);
|
||||
smtc_mmiowb(val, 0x3c5);
|
||||
}
|
||||
|
||||
static inline unsigned int smtc_seqr(int reg)
|
||||
{
|
||||
smtc_mmiowb(reg, 0x3c4);
|
||||
return smtc_mmiorb(0x3c5);
|
||||
}
|
||||
|
||||
/* The next structure holds all information relevant for a specific video mode.
|
||||
*/
|
||||
|
||||
struct ModeInit {
|
||||
int mmSizeX;
|
||||
int mmSizeY;
|
||||
int bpp;
|
||||
int hz;
|
||||
unsigned char Init_MISC;
|
||||
unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
|
||||
unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
|
||||
unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
|
||||
unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
|
||||
unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
|
||||
unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
|
||||
unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
|
||||
unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
|
||||
unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
|
||||
unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
|
||||
};
|
||||
|
||||
/**********************************************************************
|
||||
SM712 Mode table.
|
||||
**********************************************************************/
|
||||
struct ModeInit VGAMode[] = {
|
||||
{
|
||||
/* mode#0: 640 x 480 16Bpp 60Hz */
|
||||
640, 480, 16, 60,
|
||||
/* Init_MISC */
|
||||
0xE3,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
|
||||
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
|
||||
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
|
||||
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
|
||||
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
|
||||
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
|
||||
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
|
||||
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
|
||||
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
|
||||
},
|
||||
},
|
||||
{
|
||||
/* mode#1: 640 x 480 24Bpp 60Hz */
|
||||
640, 480, 24, 60,
|
||||
/* Init_MISC */
|
||||
0xE3,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
|
||||
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
|
||||
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
|
||||
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
|
||||
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
|
||||
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
|
||||
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
|
||||
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
|
||||
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
|
||||
},
|
||||
},
|
||||
{
|
||||
/* mode#0: 640 x 480 32Bpp 60Hz */
|
||||
640, 480, 32, 60,
|
||||
/* Init_MISC */
|
||||
0xE3,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
|
||||
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
|
||||
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
|
||||
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
|
||||
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
|
||||
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
|
||||
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
|
||||
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
|
||||
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
|
||||
},
|
||||
},
|
||||
|
||||
{ /* mode#2: 800 x 600 16Bpp 60Hz */
|
||||
800, 600, 16, 60,
|
||||
/* Init_MISC */
|
||||
0x2B,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
|
||||
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
|
||||
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
|
||||
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
|
||||
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||
},
|
||||
},
|
||||
{ /* mode#3: 800 x 600 24Bpp 60Hz */
|
||||
800, 600, 24, 60,
|
||||
0x2B,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
|
||||
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||
0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||
0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||
},
|
||||
},
|
||||
{ /* mode#7: 800 x 600 32Bpp 60Hz */
|
||||
800, 600, 32, 60,
|
||||
/* Init_MISC */
|
||||
0x2B,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
|
||||
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
|
||||
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
|
||||
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
|
||||
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
|
||||
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
|
||||
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
|
||||
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
|
||||
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
|
||||
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
|
||||
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
|
||||
},
|
||||
},
|
||||
/* We use 1024x768 table to light 1024x600 panel for lemote */
|
||||
{ /* mode#4: 1024 x 600 16Bpp 60Hz */
|
||||
1024, 600, 16, 60,
|
||||
/* Init_MISC */
|
||||
0xEB,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x00, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
|
||||
0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x00, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
|
||||
0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
|
||||
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||
0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
|
||||
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
|
||||
0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||
0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
|
||||
0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||
},
|
||||
},
|
||||
{ /* mode#5: 1024 x 768 24Bpp 60Hz */
|
||||
1024, 768, 24, 60,
|
||||
/* Init_MISC */
|
||||
0xEB,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x30, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
|
||||
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||
0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
|
||||
0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||
},
|
||||
},
|
||||
{ /* mode#4: 1024 x 768 32Bpp 60Hz */
|
||||
1024, 768, 32, 60,
|
||||
/* Init_MISC */
|
||||
0xEB,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
|
||||
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||
0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||
0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
|
||||
0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||
},
|
||||
},
|
||||
{ /* mode#6: 320 x 240 16Bpp 60Hz */
|
||||
320, 240, 16, 60,
|
||||
/* Init_MISC */
|
||||
0xEB,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
|
||||
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||
0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||
0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
|
||||
0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||
},
|
||||
},
|
||||
|
||||
{ /* mode#8: 320 x 240 32Bpp 60Hz */
|
||||
320, 240, 32, 60,
|
||||
/* Init_MISC */
|
||||
0xEB,
|
||||
{ /* Init_SR0_SR4 */
|
||||
0x03, 0x01, 0x0F, 0x03, 0x0E,
|
||||
},
|
||||
{ /* Init_SR10_SR24 */
|
||||
0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
|
||||
0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xC4, 0x32, 0x02, 0x01, 0x01,
|
||||
},
|
||||
{ /* Init_SR30_SR75 */
|
||||
0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
|
||||
0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
|
||||
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
|
||||
0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
|
||||
0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
|
||||
0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
|
||||
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
|
||||
0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
|
||||
0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
|
||||
},
|
||||
{ /* Init_SR80_SR93 */
|
||||
0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
|
||||
0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_SRA0_SRAF */
|
||||
0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
|
||||
0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
|
||||
},
|
||||
{ /* Init_GR00_GR08 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_AR00_AR14 */
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
|
||||
0x41, 0x00, 0x0F, 0x00, 0x00,
|
||||
},
|
||||
{ /* Init_CR00_CR18 */
|
||||
0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
|
||||
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
|
||||
0xFF,
|
||||
},
|
||||
{ /* Init_CR30_CR4D */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
|
||||
0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
|
||||
0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
|
||||
0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
|
||||
},
|
||||
{ /* Init_CR90_CRA7 */
|
||||
0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
|
||||
0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
|
||||
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
#define numVGAModes (sizeof(VGAMode) / sizeof(struct ModeInit))
|
||||
Loading…
Reference in New Issue
Block a user