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ARM: shmobile: use common DMAEngine definitions on r8a7740

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This patch switch over to use common DMAEngine definitions,
and reduced a waste of code.

It is easy to understand if sh_dmae_pdata / sh_dmae_slave_config
settings are used defined value instead of direct value.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This commit is contained in:
Kuninori Morimoto 2012-06-25 03:43:10 -07:00 committed by Rafael J. Wysocki
parent dbf382e556
commit d7de938f3d
1 changed files with 11 additions and 53 deletions
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64
arch/arm/mach-shmobile/setup-r8a7740.c
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@ -27,6 +27,7 @@
#include <linux/sh_dma.h>
#include <linux/sh_timer.h>
#include <linux/dma-mapping.h>
#include <mach/dma-register.h>
#include <mach/r8a7740.h>
#include <mach/common.h>
#include <mach/irqs.h>
@ -279,31 +280,6 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
};
/* DMA */
enum {
XMIT_SZ_8BIT = 0,
XMIT_SZ_16BIT = 1,
XMIT_SZ_32BIT = 2,
XMIT_SZ_64BIT = 7,
XMIT_SZ_128BIT = 3,
XMIT_SZ_256BIT = 4,
XMIT_SZ_512BIT = 5,
};
/* log2(size / 8) - used to calculate number of transfers */
#define TS_SHIFT { \
[XMIT_SZ_8BIT] = 0, \
[XMIT_SZ_16BIT] = 1, \
[XMIT_SZ_32BIT] = 2, \
[XMIT_SZ_64BIT] = 3, \
[XMIT_SZ_128BIT] = 4, \
[XMIT_SZ_256BIT] = 5, \
[XMIT_SZ_512BIT] = 6, \
}
#define TS_INDEX2VAL(i) ((((i) & 0x3) << 3) | (((i) & 0xc) << (20 - 2)))
#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
{
.slave_id = SHDMA_SLAVE_SDHI0_TX,
@ -370,19 +346,17 @@ static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
DMA_CHANNEL(0x60, 8, 8),
};
static const unsigned int ts_shift[] = TS_SHIFT;
static struct sh_dmae_pdata dma_platform_data = {
.slave = r8a7740_dmae_slaves,
.slave_num = ARRAY_SIZE(r8a7740_dmae_slaves),
.channel = r8a7740_dmae_channels,
.channel_num = ARRAY_SIZE(r8a7740_dmae_channels),
.ts_low_shift = 3,
.ts_low_mask = 0x18,
.ts_high_shift = (20 - 2),
.ts_high_mask = 0x00300000,
.ts_shift = ts_shift,
.ts_shift_num = ARRAY_SIZE(ts_shift),
.ts_low_shift = TS_LOW_SHIFT,
.ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT,
.ts_high_shift = TS_HI_SHIFT,
.ts_high_mask = TS_HI_BIT << TS_HI_SHIFT,
.ts_shift = dma_ts_shift,
.ts_shift_num = ARRAY_SIZE(dma_ts_shift),
.dmaor_init = DMAOR_DME,
.chclr_present = 1,
};
@ -502,20 +476,6 @@ static struct platform_device dma2_device = {
};
/* USB-DMAC */
/* Transmit sizes and respective CHCR register values */
enum {
USBTS_XMIT_SZ_8BYTE = 0,
USBTS_XMIT_SZ_16BYTE = 1,
USBTS_XMIT_SZ_32BYTE = 2,
};
/* log2(size / 8) - used to calculate number of transfers */
static const unsigned int dma_usbts_shift[] = {
[USBTS_XMIT_SZ_8BYTE] = 3,
[USBTS_XMIT_SZ_16BYTE] = 4,
[USBTS_XMIT_SZ_32BYTE] = 5,
};
static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
{
.offset = 0,
@ -524,8 +484,6 @@ static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
},
};
#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
{
.slave_id = SHDMA_SLAVE_USBHS_TX,
@ -541,10 +499,10 @@ static struct sh_dmae_pdata usb_dma_platform_data = {
.slave_num = ARRAY_SIZE(r8a7740_usb_dma_slaves),
.channel = r8a7740_usb_dma_channels,
.channel_num = ARRAY_SIZE(r8a7740_usb_dma_channels),
.ts_low_shift = 6,
.ts_low_mask = 0xc0,
.ts_high_shift = 0,
.ts_high_mask = 0,
.ts_low_shift = USBTS_LOW_SHIFT,
.ts_low_mask = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
.ts_high_shift = USBTS_HI_SHIFT,
.ts_high_mask = USBTS_HI_BIT << USBTS_HI_SHIFT,
.ts_shift = dma_usbts_shift,
.ts_shift_num = ARRAY_SIZE(dma_usbts_shift),
.dmaor_init = DMAOR_DME,