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clk: vt8500: Fix "fix device clock divisor calculations"

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Patch 72480014b8 "Fix device clock divisor calculations" was apparently
rebased incorrectly before it got upstream, causing a build error.

Replacing the "prate" pointer with the local parent_rate is most
likely the correct solution.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Arnd Bergmann 2013-03-01 14:12:01 +01:00
parent 7b59496c11
commit d6d1053a8b
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/clk-vt8500.c
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@ -157,7 +157,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
divisor = parent_rate / rate;
/* If prate / rate would be decimal, incr the divisor */
if (rate * divisor < *prate)
if (rate * divisor < parent_rate)
divisor++;
if (divisor == cdev->div_mask + 1)