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KVM: x86 emulator: Use opcode::execute for Group 1, CMPS and SCAS
The following instructions are changed to use opcode::execute. Group 1 (80-83) ADD (00-05), OR (08-0D), ADC (10-15), SBB (18-1D), AND (20-25), SUB (28-2D), XOR (30-35), CMP (38-3D) CMPS (A6-A7), SCAS (AE-AF) The last two do the same as CMP in the emulator, so em_cmp() is used. Signed-off-by: Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Takuya Yoshikawa
Avi Kivity
parent
6e2ca7d180
commit
d67fc27ae2
@ -2512,6 +2512,72 @@ static int em_ret_near_imm(struct x86_emulate_ctxt *ctxt)
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return X86EMUL_CONTINUE;
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}
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static int em_add(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("add", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_or(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("or", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_adc(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("adc", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_sbb(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_and(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_sub(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_xor(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("xor", c->src, c->dst, ctxt->eflags);
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return X86EMUL_CONTINUE;
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}
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static int em_cmp(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
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/* Disable writeback. */
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c->dst.type = OP_NONE;
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return X86EMUL_CONTINUE;
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}
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static int em_imul(struct x86_emulate_ctxt *ctxt)
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{
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struct decode_cache *c = &ctxt->decode;
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@ -2892,9 +2958,9 @@ static int check_perm_out(struct x86_emulate_ctxt *ctxt)
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#define D2bvIP(_f, _i, _p) DIP((_f) | ByteOp, _i, _p), DIP(_f, _i, _p)
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#define I2bv(_f, _e) I((_f) | ByteOp, _e), I(_f, _e)
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#define D6ALU(_f) D2bv((_f) | DstMem | SrcReg | ModRM), \
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D2bv(((_f) | DstReg | SrcMem | ModRM) & ~Lock), \
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D2bv(((_f) & ~Lock) | DstAcc | SrcImm)
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#define I6ALU(_f, _e) I2bv((_f) | DstMem | SrcReg | ModRM, _e), \
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I2bv(((_f) | DstReg | SrcMem | ModRM) & ~Lock, _e), \
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I2bv(((_f) & ~Lock) | DstAcc | SrcImm, _e)
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static struct opcode group7_rm1[] = {
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DI(SrcNone | ModRM | Priv, monitor),
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@ -2918,8 +2984,16 @@ static struct opcode group7_rm7[] = {
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DIP(SrcNone | ModRM, rdtscp, check_rdtsc),
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N, N, N, N, N, N,
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};
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static struct opcode group1[] = {
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X7(D(Lock)), N
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I(Lock, em_add),
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I(Lock, em_or),
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I(Lock, em_adc),
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I(Lock, em_sbb),
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I(Lock, em_and),
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I(Lock, em_sub),
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I(Lock, em_xor),
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I(0, em_cmp),
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};
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static struct opcode group1A[] = {
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@ -2991,25 +3065,25 @@ static struct gprefix pfx_0f_6f_0f_7f = {
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static struct opcode opcode_table[256] = {
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/* 0x00 - 0x07 */
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D6ALU(Lock),
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I6ALU(Lock, em_add),
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D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64),
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/* 0x08 - 0x0F */
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D6ALU(Lock),
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I6ALU(Lock, em_or),
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D(ImplicitOps | Stack | No64), N,
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/* 0x10 - 0x17 */
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D6ALU(Lock),
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I6ALU(Lock, em_adc),
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D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64),
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/* 0x18 - 0x1F */
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D6ALU(Lock),
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I6ALU(Lock, em_sbb),
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D(ImplicitOps | Stack | No64), D(ImplicitOps | Stack | No64),
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/* 0x20 - 0x27 */
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D6ALU(Lock), N, N,
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I6ALU(Lock, em_and), N, N,
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/* 0x28 - 0x2F */
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D6ALU(Lock), N, I(ByteOp | DstAcc | No64, em_das),
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I6ALU(Lock, em_sub), N, I(ByteOp | DstAcc | No64, em_das),
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/* 0x30 - 0x37 */
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D6ALU(Lock), N, N,
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I6ALU(Lock, em_xor), N, N,
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/* 0x38 - 0x3F */
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D6ALU(0), N, N,
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I6ALU(0, em_cmp), N, N,
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/* 0x40 - 0x4F */
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X16(D(DstReg)),
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/* 0x50 - 0x57 */
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@ -3050,12 +3124,12 @@ static struct opcode opcode_table[256] = {
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I2bv(DstAcc | SrcMem | Mov | MemAbs, em_mov),
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I2bv(DstMem | SrcAcc | Mov | MemAbs, em_mov),
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I2bv(SrcSI | DstDI | Mov | String, em_mov),
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D2bv(SrcSI | DstDI | String),
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I2bv(SrcSI | DstDI | String, em_cmp),
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/* 0xA8 - 0xAF */
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D2bv(DstAcc | SrcImm),
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I2bv(SrcAcc | DstDI | Mov | String, em_mov),
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I2bv(SrcSI | DstAcc | Mov | String, em_mov),
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D2bv(SrcAcc | DstDI | String),
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I2bv(SrcAcc | DstDI | String, em_cmp),
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/* 0xB0 - 0xB7 */
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X8(I(ByteOp | DstReg | SrcImm | Mov, em_mov)),
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/* 0xB8 - 0xBF */
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@ -3179,7 +3253,7 @@ static struct opcode twobyte_table[256] = {
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#undef D2bv
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#undef D2bvIP
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#undef I2bv
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#undef D6ALU
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#undef I6ALU
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static unsigned imm_size(struct decode_cache *c)
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{
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@ -3715,60 +3789,27 @@ special_insn:
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goto twobyte_insn;
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switch (c->b) {
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case 0x00 ... 0x05:
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add: /* add */
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emulate_2op_SrcV("add", c->src, c->dst, ctxt->eflags);
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break;
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case 0x06: /* push es */
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rc = emulate_push_sreg(ctxt, ops, VCPU_SREG_ES);
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break;
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case 0x07: /* pop es */
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rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_ES);
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break;
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case 0x08 ... 0x0d:
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or: /* or */
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emulate_2op_SrcV("or", c->src, c->dst, ctxt->eflags);
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break;
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case 0x0e: /* push cs */
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rc = emulate_push_sreg(ctxt, ops, VCPU_SREG_CS);
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break;
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case 0x10 ... 0x15:
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adc: /* adc */
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emulate_2op_SrcV("adc", c->src, c->dst, ctxt->eflags);
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break;
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case 0x16: /* push ss */
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rc = emulate_push_sreg(ctxt, ops, VCPU_SREG_SS);
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break;
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case 0x17: /* pop ss */
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rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_SS);
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break;
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case 0x18 ... 0x1d:
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sbb: /* sbb */
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emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
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break;
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case 0x1e: /* push ds */
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rc = emulate_push_sreg(ctxt, ops, VCPU_SREG_DS);
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break;
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case 0x1f: /* pop ds */
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rc = emulate_pop_sreg(ctxt, ops, VCPU_SREG_DS);
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break;
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case 0x20 ... 0x25:
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and: /* and */
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emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
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break;
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case 0x28 ... 0x2d:
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sub: /* sub */
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emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
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break;
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case 0x30 ... 0x35:
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xor: /* xor */
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emulate_2op_SrcV("xor", c->src, c->dst, ctxt->eflags);
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break;
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case 0x38 ... 0x3d:
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cmp: /* cmp */
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c->dst.type = OP_NONE; /* Disable writeback. */
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emulate_2op_SrcV("cmp", c->src, c->dst, ctxt->eflags);
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break;
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case 0x40 ... 0x47: /* inc r16/r32 */
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emulate_1op("inc", c->dst, ctxt->eflags);
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break;
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@ -3803,26 +3844,6 @@ special_insn:
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if (test_cc(c->b, ctxt->eflags))
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jmp_rel(c, c->src.val);
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break;
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case 0x80 ... 0x83: /* Grp1 */
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switch (c->modrm_reg) {
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case 0:
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goto add;
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case 1:
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goto or;
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case 2:
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goto adc;
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case 3:
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goto sbb;
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case 4:
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goto and;
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case 5:
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goto sub;
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case 6:
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goto xor;
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case 7:
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goto cmp;
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}
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break;
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case 0x84 ... 0x85:
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test:
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emulate_2op_SrcV("test", c->src, c->dst, ctxt->eflags);
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@ -3892,12 +3913,8 @@ special_insn:
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c->dst.bytes = c->op_bytes;
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rc = emulate_popf(ctxt, ops, &c->dst.val, c->op_bytes);
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break;
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case 0xa6 ... 0xa7: /* cmps */
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goto cmp;
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case 0xa8 ... 0xa9: /* test ax, imm */
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goto test;
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case 0xae ... 0xaf: /* scas */
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goto cmp;
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case 0xc0 ... 0xc1:
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emulate_grp2(ctxt);
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break;
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