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alpha: use set_irq_chip and push down __do_IRQ to the machine types

Browse Source 
Also kill superfluous IRQ_DISABLED initialization, since that's the
default state of the irq_desc[i].status field.

Tested-by: Michael Cree <mcree@orcon.net.nz>
Signed-off-by: Kyle McMartin <kyle@redhat.com>
Signed-off-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Kyle McMartin 2010-10-14 22:31:11 -04:00 committed by Matt Turner
parent e78bf5e6cb
commit d5ccde0a64
20 changed files with 59 additions and 48 deletions
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3
arch/alpha/include/asm/irq.h
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@ -88,4 +88,7 @@ static __inline__ int irq_canonicalize(int irq)
struct pt_regs;
extern void (*perf_irq)(unsigned long, struct pt_regs *);
struct irq_desc;
extern void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc);
#endif /* _ALPHA_IRQ_H */

7
arch/alpha/kernel/irq.c
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@ -159,6 +159,11 @@ handle_irq(int irq)
* at IPL 0.
*/
local_irq_disable();
__do_IRQ(irq);
generic_handle_irq(irq);
irq_exit();
}
void alpha_do_IRQ(unsigned int irq, struct irq_desc *desc)
{
__do_IRQ(irq);
}

3
arch/alpha/kernel/irq_i8259.c
View File

@ -107,8 +107,7 @@ init_i8259a_irqs(void)
outb(0xff, 0xA1); /* mask all of 8259A-2 */
for (i = 0; i < 16; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].chip = &i8259a_irq_type;
set_irq_chip_and_handler(i, &i8259a_irq_type, alpha_do_IRQ);
}
setup_irq(2, &cascade);

4
arch/alpha/kernel/irq_pyxis.c
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@ -119,8 +119,8 @@ init_pyxis_irqs(unsigned long ignore_mask)
for (i = 16; i < 48; ++i) {
if ((ignore_mask >> i) & 1)
continue;
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &pyxis_irq_type;
set_irq_chip_and_handler(i, &pyxis_irq_type, alpha_do_IRQ);
irq_desc[i].status |= IRQ_LEVEL;
}
setup_irq(16+7, &isa_cascade_irqaction);

4
arch/alpha/kernel/irq_srm.c
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@ -68,8 +68,8 @@ init_srm_irqs(long max, unsigned long ignore_mask)
for (i = 16; i < max; ++i) {
if (i < 64 && ((ignore_mask >> i) & 1))
continue;
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &srm_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &srm_irq_type, alpha_do_IRQ);
}
}

4
arch/alpha/kernel/sys_alcor.c
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@ -142,8 +142,8 @@ alcor_init_irq(void)
on while IRQ probing. */
if (i >= 16+20 && i <= 16+30)
continue;
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &alcor_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &alcor_irq_type, alpha_do_IRQ);
}
i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;

5
arch/alpha/kernel/sys_cabriolet.c
View File

@ -122,8 +122,9 @@ common_init_irq(void (*srm_dev_int)(unsigned long v))
outb(0xff, 0x806);
for (i = 16; i < 35; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &cabriolet_irq_type;
set_irq_chip_and_handler(i, &cabriolet_irq_type,
alpha_do_IRQ);
irq_desc[i].status |= IRQ_LEVEL;
}
}

4
arch/alpha/kernel/sys_dp264.c
View File

@ -302,8 +302,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax)
{
long i;
for (i = imin; i <= imax; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = ops;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, ops, alpha_do_IRQ);
}
}

4
arch/alpha/kernel/sys_eb64p.c
View File

@ -135,8 +135,8 @@ eb64p_init_irq(void)
init_i8259a_irqs();
for (i = 16; i < 32; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &eb64p_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &eb64p_irq_type, alpha_do_IRQ);
}
common_init_isa_dma();

4
arch/alpha/kernel/sys_eiger.c
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@ -153,8 +153,8 @@ eiger_init_irq(void)
init_i8259a_irqs();
for (i = 16; i < 128; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &eiger_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &eiger_irq_type, alpha_do_IRQ);
}
}

10
arch/alpha/kernel/sys_jensen.c
View File

@ -206,11 +206,11 @@ jensen_init_irq(void)
{
init_i8259a_irqs();
irq_desc[1].chip = &jensen_local_irq_type;
irq_desc[4].chip = &jensen_local_irq_type;
irq_desc[3].chip = &jensen_local_irq_type;
irq_desc[7].chip = &jensen_local_irq_type;
irq_desc[9].chip = &jensen_local_irq_type;
set_irq_chip_and_handler(1, &jensen_local_irq_type, alpha_do_IRQ);
set_irq_chip_and_handler(4, &jensen_local_irq_type, alpha_do_IRQ);
set_irq_chip_and_handler(3, &jensen_local_irq_type, alpha_do_IRQ);
set_irq_chip_and_handler(7, &jensen_local_irq_type, alpha_do_IRQ);
set_irq_chip_and_handler(9, &jensen_local_irq_type, alpha_do_IRQ);
common_init_isa_dma();
}

12
arch/alpha/kernel/sys_marvel.c
View File

@ -304,8 +304,8 @@ init_io7_irqs(struct io7 *io7,
/* Set up the lsi irqs. */
for (i = 0; i < 128; ++i) {
irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[base + i].chip = lsi_ops;
irq_desc[base + i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(base + i, lsi_ops, alpha_do_IRQ);
}
/* Disable the implemented irqs in hardware. */
@ -318,8 +318,8 @@ init_io7_irqs(struct io7 *io7,
/* Set up the msi irqs. */
for (i = 128; i < (128 + 512); ++i) {
irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[base + i].chip = msi_ops;
irq_desc[base + i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(base + i, msi_ops, alpha_do_IRQ);
}
for (i = 0; i < 16; ++i)
@ -336,8 +336,8 @@ marvel_init_irq(void)
/* Reserve the legacy irqs. */
for (i = 0; i < 16; ++i) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].chip = &marvel_legacy_irq_type;
set_irq_chip_and_handler(i, &marvel_legacy_irq_type,
alpha_do_IRQ);
}
/* Init the io7 irqs. */

4
arch/alpha/kernel/sys_mikasa.c
View File

@ -115,8 +115,8 @@ mikasa_init_irq(void)
mikasa_update_irq_hw(0);
for (i = 16; i < 32; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &mikasa_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &mikasa_irq_type, alpha_do_IRQ);
}
init_i8259a_irqs();

4
arch/alpha/kernel/sys_noritake.c
View File

@ -144,8 +144,8 @@ noritake_init_irq(void)
outw(0, 0x54c);
for (i = 16; i < 48; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &noritake_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &noritake_irq_type, alpha_do_IRQ);
}
init_i8259a_irqs();

4
arch/alpha/kernel/sys_rawhide.c
View File

@ -194,8 +194,8 @@ rawhide_init_irq(void)
}
for (i = 16; i < 128; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &rawhide_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &rawhide_irq_type, alpha_do_IRQ);
}
init_i8259a_irqs();

4
arch/alpha/kernel/sys_rx164.c
View File

@ -116,8 +116,8 @@ rx164_init_irq(void)
rx164_update_irq_hw(0);
for (i = 16; i < 40; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &rx164_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &rx164_irq_type, alpha_do_IRQ);
}
init_i8259a_irqs();

5
arch/alpha/kernel/sys_sable.c
View File

@ -535,8 +535,9 @@ sable_lynx_init_irq(int nr_of_irqs)
long i;
for (i = 0; i < nr_of_irqs; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &sable_lynx_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &sable_lynx_irq_type,
alpha_do_IRQ);
}
common_init_isa_dma();

4
arch/alpha/kernel/sys_takara.c
View File

@ -153,8 +153,8 @@ takara_init_irq(void)
takara_update_irq_hw(i, -1);
for (i = 16; i < 128; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = &takara_irq_type;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, &takara_irq_type, alpha_do_IRQ);
}
common_init_isa_dma();

4
arch/alpha/kernel/sys_titan.c
View File

@ -189,8 +189,8 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax)
{
long i;
for (i = imin; i <= imax; ++i) {
irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i].chip = ops;
irq_desc[i].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i, ops, alpha_do_IRQ);
}
}

14
arch/alpha/kernel/sys_wildfire.c
View File

@ -198,15 +198,17 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
for (i = 0; i < 16; ++i) {
if (i == 2)
continue;
irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i+irq_bias].chip = &wildfire_irq_type;
irq_desc[i+irq_bias].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
alpha_do_IRQ);
}
irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[36+irq_bias].chip = &wildfire_irq_type;
irq_desc[36+irq_bias].status |= IRQ_LEVEL;
set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, alpha_do_IRQ);
for (i = 40; i < 64; ++i) {
irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
irq_desc[i+irq_bias].chip = &wildfire_irq_type;
irq_desc[i+irq_bias].status |= IRQ_LEVEL;
set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type,
alpha_do_IRQ);
}
setup_irq(32+irq_bias, &isa_enable);