korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-11 12:28:41 +08:00
Code Issues Packages Projects Releases Wiki Activity

riscv: Fix Zbb alternative IDs

Browse Source 
Commit 4bf8860760 ("riscv: cpufeature: extend
riscv_cpufeature_patch_func to all ISA extensions") switched ISA
extension alternatives to use the RISCV_ISA_EXT_* macros instead of
CPUFEATURE_*. This was mismerged when applied on top of the Zbb series,
so the Zbb alternatives referenced the wrong errata ID values.

Fixes: 9daca9a5b9 ("Merge patch series "riscv: improve boot time isa extensions handling"")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230212021534.59121-3-samuel@sholland.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Samuel Holland 2023-02-11 20:15:33 -06:00 committed by Palmer Dabbelt
parent bfd6fc5d80
commit d5a7fab785
No known key found for this signature in database
GPG Key ID: 2E1319F35FBB1889
4 changed files with 3 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/riscv/include/asm/errata_list.h
View File

@ -23,11 +23,6 @@
#define ERRATA_THEAD_NUMBER 3 #define ERRATA_THEAD_NUMBER 3
#endif #endif
#define CPUFEATURE_SVPBMT 0
#define CPUFEATURE_ZICBOM 1
#define CPUFEATURE_ZBB 2
#define CPUFEATURE_NUMBER 3
#ifdef __ASSEMBLY__ #ifdef __ASSEMBLY__
#define ALT_INSN_FAULT(x) \ #define ALT_INSN_FAULT(x) \

2
arch/riscv/lib/strcmp.S
View File

@ -9,7 +9,7 @@
/* int strcmp(const char *cs, const char *ct) */ /* int strcmp(const char *cs, const char *ct) */
SYM_FUNC_START(strcmp) SYM_FUNC_START(strcmp)
ALTERNATIVE("nop", "j strcmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) ALTERNATIVE("nop", "j strcmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
/* /*
* Returns * Returns

2
arch/riscv/lib/strlen.S
View File

@ -9,7 +9,7 @@
/* int strlen(const char *s) */ /* int strlen(const char *s) */
SYM_FUNC_START(strlen) SYM_FUNC_START(strlen)
ALTERNATIVE("nop", "j strlen_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) ALTERNATIVE("nop", "j strlen_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
/* /*
* Returns * Returns

2
arch/riscv/lib/strncmp.S
View File

@ -9,7 +9,7 @@
/* int strncmp(const char *cs, const char *ct, size_t count) */ /* int strncmp(const char *cs, const char *ct, size_t count) */
SYM_FUNC_START(strncmp) SYM_FUNC_START(strncmp)
ALTERNATIVE("nop", "j strncmp_zbb", 0, CPUFEATURE_ZBB, CONFIG_RISCV_ISA_ZBB) ALTERNATIVE("nop", "j strncmp_zbb", 0, RISCV_ISA_EXT_ZBB, CONFIG_RISCV_ISA_ZBB)
/* /*
* Returns * Returns