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powerpc/64: enhance memcmp() with VMX instruction for long bytes comparision
This patch add VMX primitives to do memcmp() in case the compare size
is equal or greater than 4K bytes. KSM feature can benefit from this.
Test result with following test program(replace the "^>" with ""):
------
># cat tools/testing/selftests/powerpc/stringloops/memcmp.c
>#include <malloc.h>
>#include <stdlib.h>
>#include <string.h>
>#include <time.h>
>#include "utils.h"
>#define SIZE (1024 * 1024 * 900)
>#define ITERATIONS 40
int test_memcmp(const void *s1, const void *s2, size_t n);
static int testcase(void)
{
char *s1;
char *s2;
unsigned long i;
s1 = memalign(128, SIZE);
if (!s1) {
perror("memalign");
exit(1);
}
s2 = memalign(128, SIZE);
if (!s2) {
perror("memalign");
exit(1);
}
for (i = 0; i < SIZE; i++) {
s1[i] = i & 0xff;
s2[i] = i & 0xff;
}
for (i = 0; i < ITERATIONS; i++) {
int ret = test_memcmp(s1, s2, SIZE);
if (ret) {
printf("return %d at[%ld]! should have returned zero\n", ret, i);
abort();
}
}
return 0;
}
int main(void)
{
return test_harness(testcase, "memcmp");
}
------
Without this patch (but with the first patch "powerpc/64: Align bytes
before fall back to .Lshort in powerpc64 memcmp()." in the series):
4.726728762 seconds time elapsed ( +- 3.54%)
With VMX patch:
4.234335473 seconds time elapsed ( +- 2.63%)
There is ~+10% improvement.
Testing with unaligned and different offset version (make s1 and s2 shift
random offset within 16 bytes) can archieve higher improvement than 10%..
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Simon Guo
Michael Ellerman
parent
f1ecbaf466
commit
d58badfb7c
@ -48,8 +48,8 @@ void __trace_opal_exit(long opcode, unsigned long retval);
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/* VMX copying */
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int enter_vmx_usercopy(void);
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int exit_vmx_usercopy(void);
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int enter_vmx_copy(void);
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void * exit_vmx_copy(void *dest);
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int enter_vmx_ops(void);
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void *exit_vmx_ops(void *dest);
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/* Traps */
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long machine_check_early(struct pt_regs *regs);
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@ -57,7 +57,7 @@ _GLOBAL(copypage_power7)
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
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std r0,16(r1)
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stdu r1,-STACKFRAMESIZE(r1)
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bl enter_vmx_copy
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bl enter_vmx_ops
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cmpwi r3,0
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ld r0,STACKFRAMESIZE+16(r1)
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ld r3,STK_REG(R31)(r1)
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@ -100,7 +100,7 @@ _GLOBAL(copypage_power7)
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addi r3,r3,128
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bdnz 1b
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b exit_vmx_copy /* tail call optimise */
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b exit_vmx_ops /* tail call optimise */
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#else
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li r0,(PAGE_SIZE/128)
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@ -9,6 +9,7 @@
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*/
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#include <asm/ppc_asm.h>
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#include <asm/export.h>
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#include <asm/ppc-opcode.h>
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#define off8 r6
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#define off16 r7
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@ -27,12 +28,73 @@
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#define LH lhbrx
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#define LW lwbrx
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#define LD ldbrx
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#define LVS lvsr
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#define VPERM(_VRT,_VRA,_VRB,_VRC) \
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vperm _VRT,_VRB,_VRA,_VRC
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#else
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#define LH lhzx
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#define LW lwzx
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#define LD ldx
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#define LVS lvsl
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#define VPERM(_VRT,_VRA,_VRB,_VRC) \
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vperm _VRT,_VRA,_VRB,_VRC
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#endif
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#define VMX_THRESH 4096
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#define ENTER_VMX_OPS \
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mflr r0; \
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1); \
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1); \
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
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std r0,16(r1); \
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stdu r1,-STACKFRAMESIZE(r1); \
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bl enter_vmx_ops; \
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cmpwi cr1,r3,0; \
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ld r0,STACKFRAMESIZE+16(r1); \
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ld r3,STK_REG(R31)(r1); \
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ld r4,STK_REG(R30)(r1); \
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ld r5,STK_REG(R29)(r1); \
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addi r1,r1,STACKFRAMESIZE; \
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mtlr r0
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#define EXIT_VMX_OPS \
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mflr r0; \
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1); \
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1); \
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1); \
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std r0,16(r1); \
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stdu r1,-STACKFRAMESIZE(r1); \
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bl exit_vmx_ops; \
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ld r0,STACKFRAMESIZE+16(r1); \
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ld r3,STK_REG(R31)(r1); \
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ld r4,STK_REG(R30)(r1); \
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ld r5,STK_REG(R29)(r1); \
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addi r1,r1,STACKFRAMESIZE; \
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mtlr r0
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/*
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* LD_VSR_CROSS16B load the 2nd 16 bytes for _vaddr which is unaligned with
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* 16 bytes boundary and permute the result with the 1st 16 bytes.
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* | y y y y y y y y y y y y y 0 1 2 | 3 4 5 6 7 8 9 a b c d e f z z z |
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* ^ ^ ^
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* 0xbbbb10 0xbbbb20 0xbbb30
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* ^
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* _vaddr
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*
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*
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* _vmask is the mask generated by LVS
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* _v1st_qw is the 1st aligned QW of current addr which is already loaded.
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* for example: 0xyyyyyyyyyyyyy012 for big endian
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* _v2nd_qw is the 2nd aligned QW of cur _vaddr to be loaded.
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* for example: 0x3456789abcdefzzz for big endian
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* The permute result is saved in _v_res.
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* for example: 0x0123456789abcdef for big endian.
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*/
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#define LD_VSR_CROSS16B(_vaddr,_vmask,_v1st_qw,_v2nd_qw,_v_res) \
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lvx _v2nd_qw,_vaddr,off16; \
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VPERM(_v_res,_v1st_qw,_v2nd_qw,_vmask)
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/*
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* There are 2 categories for memcmp:
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* 1) src/dst has the same offset to the 8 bytes boundary. The handlers
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@ -40,7 +102,7 @@
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* 2) src/dst has different offset to the 8 bytes boundary. The handlers
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* are named like .Ldiffoffset_xxxx
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*/
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_GLOBAL(memcmp)
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_GLOBAL_TOC(memcmp)
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cmpdi cr1,r5,0
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/* Use the short loop if the src/dst addresses are not
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@ -132,7 +194,7 @@ _GLOBAL(memcmp)
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bgt cr6,.Llong
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.Lcmp_lt32bytes:
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/* compare 1 ~ 32 bytes, at least r3 addr is 8 bytes aligned now */
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/* compare 1 ~ 31 bytes, at least r3 addr is 8 bytes aligned now */
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cmpdi cr5,r5,7
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srdi r0,r5,3
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ble cr5,.Lcmp_rest_lt8bytes
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@ -173,6 +235,15 @@ _GLOBAL(memcmp)
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blr
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.Llong:
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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/* Try to use vmx loop if length is equal or greater than 4K */
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cmpldi cr6,r5,VMX_THRESH
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bge cr6,.Lsameoffset_vmx_cmp
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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.Llong_novmx_cmp:
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#endif
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/* At least s1 addr is aligned with 8 bytes */
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li off8,8
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li off16,16
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@ -330,7 +401,97 @@ _GLOBAL(memcmp)
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li r3,-1
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blr
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#ifdef CONFIG_ALTIVEC
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.Lsameoffset_vmx_cmp:
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/* Enter with src/dst addrs has the same offset with 8 bytes
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* align boundary
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*/
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ENTER_VMX_OPS
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beq cr1,.Llong_novmx_cmp
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3:
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/* need to check whether r4 has the same offset with r3
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* for 16 bytes boundary.
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*/
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xor r0,r3,r4
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andi. r0,r0,0xf
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bne .Ldiffoffset_vmx_cmp_start
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/* len is no less than 4KB. Need to align with 16 bytes further.
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*/
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andi. rA,r3,8
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LD rA,0,r3
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beq 4f
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LD rB,0,r4
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cmpld cr0,rA,rB
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addi r3,r3,8
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addi r4,r4,8
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addi r5,r5,-8
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beq cr0,4f
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/* save and restore cr0 */
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mfocrf r5,128
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EXIT_VMX_OPS
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mtocrf 128,r5
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b .LcmpAB_lightweight
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4:
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/* compare 32 bytes for each loop */
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srdi r0,r5,5
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mtctr r0
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clrldi r5,r5,59
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li off16,16
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.balign 16
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5:
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lvx v0,0,r3
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lvx v1,0,r4
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VCMPEQUD_RC(v0,v0,v1)
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bnl cr6,7f
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lvx v0,off16,r3
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lvx v1,off16,r4
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VCMPEQUD_RC(v0,v0,v1)
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bnl cr6,6f
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addi r3,r3,32
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addi r4,r4,32
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bdnz 5b
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EXIT_VMX_OPS
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cmpdi r5,0
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beq .Lzero
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b .Lcmp_lt32bytes
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6:
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addi r3,r3,16
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addi r4,r4,16
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7:
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/* diff the last 16 bytes */
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EXIT_VMX_OPS
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LD rA,0,r3
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LD rB,0,r4
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cmpld cr0,rA,rB
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li off8,8
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bne cr0,.LcmpAB_lightweight
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LD rA,off8,r3
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LD rB,off8,r4
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cmpld cr0,rA,rB
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bne cr0,.LcmpAB_lightweight
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b .Lzero
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#endif
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.Ldiffoffset_8bytes_make_align_start:
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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/* only do vmx ops when the size equal or greater than 4K bytes */
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cmpdi cr5,r5,VMX_THRESH
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bge cr5,.Ldiffoffset_vmx_cmp
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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.Ldiffoffset_novmx_cmp:
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#endif
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/* now try to align s1 with 8 bytes */
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rlwinm r6,r3,3,26,28
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beq .Ldiffoffset_align_s1_8bytes
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@ -356,6 +517,82 @@ _GLOBAL(memcmp)
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/* now s1 is aligned with 8 bytes. */
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cmpdi cr5,r5,31
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ble cr5,.Lcmp_lt32bytes
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b .Llong
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#ifdef CONFIG_ALTIVEC
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b .Llong_novmx_cmp
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#else
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b .Llong
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#endif
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#ifdef CONFIG_ALTIVEC
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.Ldiffoffset_vmx_cmp:
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ENTER_VMX_OPS
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beq cr1,.Ldiffoffset_novmx_cmp
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.Ldiffoffset_vmx_cmp_start:
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/* Firstly try to align r3 with 16 bytes */
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andi. r6,r3,0xf
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li off16,16
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beq .Ldiffoffset_vmx_s1_16bytes_align
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LVS v3,0,r3
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LVS v4,0,r4
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lvx v5,0,r3
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lvx v6,0,r4
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LD_VSR_CROSS16B(r3,v3,v5,v7,v9)
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LD_VSR_CROSS16B(r4,v4,v6,v8,v10)
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VCMPEQUB_RC(v7,v9,v10)
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bnl cr6,.Ldiffoffset_vmx_diff_found
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subfic r6,r6,16
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subf r5,r6,r5
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add r3,r3,r6
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add r4,r4,r6
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.Ldiffoffset_vmx_s1_16bytes_align:
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/* now s1 is aligned with 16 bytes */
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lvx v6,0,r4
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LVS v4,0,r4
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srdi r6,r5,5 /* loop for 32 bytes each */
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clrldi r5,r5,59
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mtctr r6
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.balign 16
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.Ldiffoffset_vmx_32bytesloop:
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/* the first qw of r4 was saved in v6 */
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lvx v9,0,r3
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LD_VSR_CROSS16B(r4,v4,v6,v8,v10)
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VCMPEQUB_RC(v7,v9,v10)
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vor v6,v8,v8
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bnl cr6,.Ldiffoffset_vmx_diff_found
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addi r3,r3,16
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addi r4,r4,16
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lvx v9,0,r3
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LD_VSR_CROSS16B(r4,v4,v6,v8,v10)
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VCMPEQUB_RC(v7,v9,v10)
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vor v6,v8,v8
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bnl cr6,.Ldiffoffset_vmx_diff_found
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addi r3,r3,16
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addi r4,r4,16
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bdnz .Ldiffoffset_vmx_32bytesloop
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EXIT_VMX_OPS
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cmpdi r5,0
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beq .Lzero
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b .Lcmp_lt32bytes
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.Ldiffoffset_vmx_diff_found:
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EXIT_VMX_OPS
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/* anyway, the diff will appear in next 16 bytes */
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li r5,16
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b .Lcmp_lt32bytes
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#endif
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EXPORT_SYMBOL(memcmp)
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@ -230,7 +230,7 @@ _GLOBAL(memcpy_power7)
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1)
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std r0,16(r1)
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stdu r1,-STACKFRAMESIZE(r1)
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bl enter_vmx_copy
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bl enter_vmx_ops
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cmpwi cr1,r3,0
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ld r0,STACKFRAMESIZE+16(r1)
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ld r3,STK_REG(R31)(r1)
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@ -445,7 +445,7 @@ _GLOBAL(memcpy_power7)
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15: addi r1,r1,STACKFRAMESIZE
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ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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b exit_vmx_copy /* tail call optimise */
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b exit_vmx_ops /* tail call optimise */
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.Lvmx_unaligned_copy:
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/* Get the destination 16B aligned */
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@ -649,5 +649,5 @@ _GLOBAL(memcpy_power7)
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15: addi r1,r1,STACKFRAMESIZE
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ld r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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b exit_vmx_copy /* tail call optimise */
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b exit_vmx_ops /* tail call optimise */
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#endif /* CONFIG_ALTIVEC */
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@ -53,7 +53,7 @@ int exit_vmx_usercopy(void)
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return 0;
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}
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int enter_vmx_copy(void)
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int enter_vmx_ops(void)
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{
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if (in_interrupt())
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return 0;
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@ -70,7 +70,7 @@ int enter_vmx_copy(void)
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* passed a pointer to the destination which we return as required by a
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* memcpy implementation.
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*/
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void *exit_vmx_copy(void *dest)
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void *exit_vmx_ops(void *dest)
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{
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disable_kernel_altivec();
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preempt_enable();
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