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Two more SME fixes related to ptrace(): ensure that the SME is properly
set up for the target thread and that the thread sees the ZT registers set via ptrace. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmTftxwACgkQa9axLQDI XvFYOg/9HlGxpKuWlaNZ9g9pUXPdmCnlqBRbHkqDtPdPwH/Gylh3P5DFcRDFWCS0 74dls3iqQ0muAeKObB4EvfGTBRngX0HhEXTVnk81JFtTchVclzYtZa1J5+wO4c2Q UK/+iwRddGqTGUNQJWG9qEkV9FoaDOmnuV1ZSUDF+AiAzQloEJlWqPxnX3b+ZX33 agoEir1i8hhtfKVReappIxZHWEcGUiBCKMFtkTACaJkGucg6uaNM7vzhjfzYlCrB 3qxEQXCgTCjWTuzhOAAKi98Q/t8KP1Hcm4WGi6yLC16hyU/P3wy7HPL5s1CowROt /Ttkv9ux9W4ZUx8qmvWwmxjtFjmQZRAvcRGZg0XqdsnKul3NUCdVnXNWp+sGS8tk HVOtzTo5WlC+YKlO5uweTXBwS/hbH5M/mZPiEv4p3jsEVHpc43EUsM8RiLQRZPv7 6fllZXoSje2Npf2evTlwQqiDrSDe2fHxCiUbQ8NpLTD+tr9M2j0xCAbVJd7qhd9i PdbLHTKFgR0ScZCDcnWSUwqCSNIFUHQNhnvLaYx5PIWchOimE4HCcQZcM9mc7643 1jwGNIE2FP/7mLwoQNr/ri3rs0eYWXTZ6QaTXUmicCZnp4IhKKxeVzTmSSH67LRK DBcMUW4FXk85Z2dBgn3KbaMkdqAHcv4SAU3CzyfgWpJlb/z7/iI= =1dyE -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: "Two more SME fixes related to ptrace(): ensure that the SME is properly set up for the target thread and that the thread sees the ZT registers set via ptrace" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/ptrace: Ensure that the task sees ZT writes on first use arm64/ptrace: Ensure that SME is set up for target when writing SSVE state
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d4ddefee51
@ -356,7 +356,7 @@ static inline int sme_max_virtualisable_vl(void)
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return vec_max_virtualisable_vl(ARM64_VEC_SME);
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}
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extern void sme_alloc(struct task_struct *task);
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extern void sme_alloc(struct task_struct *task, bool flush);
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extern unsigned int sme_get_vl(void);
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extern int sme_set_current_vl(unsigned long arg);
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extern int sme_get_current_vl(void);
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@ -388,7 +388,7 @@ static inline void sme_smstart_sm(void) { }
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static inline void sme_smstop_sm(void) { }
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static inline void sme_smstop(void) { }
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static inline void sme_alloc(struct task_struct *task) { }
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static inline void sme_alloc(struct task_struct *task, bool flush) { }
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static inline void sme_setup(void) { }
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static inline unsigned int sme_get_vl(void) { return 0; }
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static inline int sme_max_vl(void) { return 0; }
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@ -1285,9 +1285,9 @@ void fpsimd_release_task(struct task_struct *dead_task)
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* the interest of testability and predictability, the architecture
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* guarantees that when ZA is enabled it will be zeroed.
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*/
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void sme_alloc(struct task_struct *task)
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void sme_alloc(struct task_struct *task, bool flush)
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{
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if (task->thread.sme_state) {
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if (task->thread.sme_state && flush) {
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memset(task->thread.sme_state, 0, sme_state_size(task));
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return;
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}
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@ -1515,7 +1515,7 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)
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}
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sve_alloc(current, false);
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sme_alloc(current);
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sme_alloc(current, true);
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if (!current->thread.sve_state || !current->thread.sme_state) {
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force_sig(SIGKILL);
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return;
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@ -881,6 +881,13 @@ static int sve_set_common(struct task_struct *target,
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break;
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case ARM64_VEC_SME:
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target->thread.svcr |= SVCR_SM_MASK;
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/*
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* Disable traps and ensure there is SME storage but
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* preserve any currently set values in ZA/ZT.
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*/
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sme_alloc(target, false);
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set_tsk_thread_flag(target, TIF_SME);
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break;
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default:
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WARN_ON_ONCE(1);
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@ -1100,7 +1107,7 @@ static int za_set(struct task_struct *target,
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}
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/* Allocate/reinit ZA storage */
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sme_alloc(target);
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sme_alloc(target, true);
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if (!target->thread.sme_state) {
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ret = -ENOMEM;
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goto out;
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@ -1170,8 +1177,13 @@ static int zt_set(struct task_struct *target,
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if (!system_supports_sme2())
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return -EINVAL;
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/* Ensure SVE storage in case this is first use of SME */
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sve_alloc(target, false);
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if (!target->thread.sve_state)
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return -ENOMEM;
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if (!thread_za_enabled(&target->thread)) {
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sme_alloc(target);
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sme_alloc(target, true);
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if (!target->thread.sme_state)
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return -ENOMEM;
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}
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@ -1179,8 +1191,10 @@ static int zt_set(struct task_struct *target,
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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thread_zt_state(&target->thread),
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0, ZT_SIG_REG_BYTES);
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if (ret == 0)
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if (ret == 0) {
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target->thread.svcr |= SVCR_ZA_MASK;
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set_tsk_thread_flag(target, TIF_SME);
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}
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fpsimd_flush_task_state(target);
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@ -475,7 +475,7 @@ static int restore_za_context(struct user_ctxs *user)
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fpsimd_flush_task_state(current);
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/* From now, fpsimd_thread_switch() won't touch thread.sve_state */
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sme_alloc(current);
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sme_alloc(current, true);
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if (!current->thread.sme_state) {
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current->thread.svcr &= ~SVCR_ZA_MASK;
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clear_thread_flag(TIF_SME);
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