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ASoC: SOF: Intel: hda: Correct Firmware State Register use

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Merge series from Peter Ujfalusi <peter.ujfalusi@linux.intel.com>:

Hi,

The FSR (Firmware State Register) holds the ROM state information, it does not
contain error information.
The FSR itself is a bit more complicated as well as the state depends on the
module currently in use.

The error code from ROM or the status code from the firmware is located at the
next register.

Fix the handling of the FSR in order to provide usable and human readable (in
most cases) report on the status and error.

Regards,
Peter
---
Peter Ujfalusi (3):
  ASoC: SOF: Intel: hda: Correct the ROM/FW state reporting code
  ASoC: SOF: Intel: hda-loader: Use the FSR state definitions during
    bootup
  ASoC: SOF: Intel: hda: Drop no longer used ROM state definitions

 sound/soc/sof/intel/hda-loader.c |  10 +--
 sound/soc/sof/intel/hda.c        | 147 ++++++++++++++++++++++++++-----
 sound/soc/sof/intel/hda.h        |  69 +++++++++++++--
 3 files changed, 194 insertions(+), 32 deletions(-)

--
2.37.0
This commit is contained in:
Mark Brown 2022-08-23 19:48:41 +01:00
commit d4a9fd8292
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
2 changed files with 4 additions and 12 deletions
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10
sound/soc/sof/intel/hda-loader.c
View File

@ -177,14 +177,13 @@ int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot)
* - IMR boot: wait for ROM firmware entered (firmware booted up from IMR)
*/
if (imr_boot)
target_status = HDA_DSP_ROM_FW_ENTERED;
target_status = FSR_STATE_FW_ENTERED;
else
target_status = HDA_DSP_ROM_INIT;
target_status = FSR_STATE_INIT_DONE;
ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
chip->rom_status_reg, status,
((status & HDA_DSP_ROM_STS_MASK)
== target_status),
(FSR_TO_STATE_CODE(status) == target_status),
HDA_DSP_REG_POLL_INTERVAL_US,
chip->rom_init_timeout *
USEC_PER_MSEC);
@ -292,8 +291,7 @@ int hda_cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *hext_stream
status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR,
chip->rom_status_reg, reg,
((reg & HDA_DSP_ROM_STS_MASK)
== HDA_DSP_ROM_FW_ENTERED),
(FSR_TO_STATE_CODE(reg) == FSR_STATE_FW_ENTERED),
HDA_DSP_REG_POLL_INTERVAL_US,
HDA_DSP_BASEFW_TIMEOUT_US);

6
sound/soc/sof/intel/hda.h
View File

@ -251,12 +251,6 @@
#define FSR_STATE_BRINGUP_FW_ENTERED FSR_STATE_FW_ENTERED
/* ROM status/error values */
#define HDA_DSP_ROM_STS_MASK GENMASK(23, 0)
#define HDA_DSP_ROM_INIT 0x1
#define HDA_DSP_ROM_FW_MANIFEST_LOADED 0x3
#define HDA_DSP_ROM_FW_FW_LOADED 0x4
#define HDA_DSP_ROM_FW_ENTERED 0x5
#define HDA_DSP_ROM_RFW_START 0xf
#define HDA_DSP_ROM_CSE_ERROR 40
#define HDA_DSP_ROM_CSE_WRONG_RESPONSE 41
#define HDA_DSP_ROM_IMR_TO_SMALL 42