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Actions Semi ARM DT for v5.10:
- Add devicetree support for Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/ - Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU - Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/ -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEZ6VDKoFIy9ikWCeXVZ8R5v6RzvUFAl9prhwACgkQVZ8R5v6R zvVUKwgAp09Kdu17PUNmoqjujUmkAlANgzW30Z12ear1hSJNEoXV8ZgswAYyeerk exPQWXEvueDYXXgXiLCjaOI8p/Ukae4wc8eaTyYN7i0JMxGQ1wnpdEI8su1VC+ph +RuL/mH/dc/pibWMBVIf+YP4mfQz+RCX1+VRHbINKHeMuQ3rCecQ6352GZxkt/EU 3BEr2QpNBvIwMLxllUf51k/ng9w2mtEk+7uDEPJmBtUCbRUWxhq5UexAoUJbPvLU 2f8OpYh4Tbnxl/FLuRYCl0Yhk2bB9600HNhx1enK/P2u3wuJkK1tDlmLZoYOuirc imx3OrzSnqOtAJBg2chcaY2tq+SUtA== =PNl0 -----END PGP SIGNATURE----- Merge tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM DT for v5.10: - Add devicetree support for Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/ - Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU - Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/ * tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: ARM: dts: owl-s500: Add RoseapplePi ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers ARM: dts: Add Caninos Loucos Labrador v2 Link: https://lore.kernel.org/r/20200922113712.GB11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
d4509b6545
@ -873,6 +873,8 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
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dtb-$(CONFIG_ARCH_ACTIONS) += \
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owl-s500-cubieboard6.dtb \
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owl-s500-guitar-bb-rev-b.dtb \
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owl-s500-labrador-base-m.dtb \
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owl-s500-roseapplepi.dtb \
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owl-s500-sparky.dtb
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dtb-$(CONFIG_ARCH_PICOXCELL) += \
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picoxcell-pc7302-pc3x2.dtb \
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35
arch/arm/boot/dts/owl-s500-labrador-base-m.dts
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arch/arm/boot/dts/owl-s500-labrador-base-m.dts
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@ -0,0 +1,35 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Caninos Labrador Base Board
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*
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* Copyright (c) 2019-2020 Matheus Castello
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*/
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/dts-v1/;
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#include "owl-s500-labrador-v2.dtsi"
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/ {
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model = "Caninos Labrador Core v2 on Labrador Base-M v1";
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compatible = "caninos,labrador-base-m",
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"caninos,labrador-v2", "actions,s500";
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aliases {
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serial3 = &uart3;
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};
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chosen {
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stdout-path = "serial3:115200n8";
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};
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uart3_clk: uart3-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&uart3 {
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status = "okay";
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clocks = <&uart3_clk>;
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};
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22
arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
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22
arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
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@ -0,0 +1,22 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Caninos Labrador SoM V2
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*
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* Copyright (c) 2019-2020 Matheus Castello
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*/
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#include "owl-s500.dtsi"
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/ {
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model = "Caninos Labrador Core V2.1";
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compatible = "caninos,labrador-v2", "actions,s500";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000>;
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};
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};
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&timer {
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clocks = <&hosc>;
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};
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47
arch/arm/boot/dts/owl-s500-roseapplepi.dts
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47
arch/arm/boot/dts/owl-s500-roseapplepi.dts
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@ -0,0 +1,47 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Roseapple Pi
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*
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* Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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*/
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/dts-v1/;
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#include "owl-s500.dtsi"
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/ {
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compatible = "roseapplepi,roseapplepi", "actions,s500";
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model = "Roseapple Pi";
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aliases {
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serial2 = &uart2;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000>; /* 2GB */
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};
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uart2_clk: uart2-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&twd_timer {
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status = "okay";
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};
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&timer {
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clocks = <&hosc>;
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};
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&uart2 {
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status = "okay";
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clocks = <&uart2_clk>;
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};
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@ -84,21 +84,21 @@
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global_timer: timer@b0020200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0xb0020200 0x100>;
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interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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status = "disabled";
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};
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twd_timer: timer@b0020600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xb0020600 0x20>;
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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status = "disabled";
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};
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twd_wdt: wdt@b0020620 {
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compatible = "arm,cortex-a9-twd-wdt";
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reg = <0xb0020620 0xe0>;
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interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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status = "disabled";
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};
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