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drm/radeon/dpm: fix UVD clock setting on cayman
The rv770 version was using the wrong power state type. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
02478a102b
commit
d434e81e59
@ -3475,6 +3475,42 @@ static void ni_enable_dynamic_pcie_gen2(struct radeon_device *rdev,
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WREG32_P(GENERAL_PWRMGT, 0, ~ENABLE_GEN2PCIE);
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}
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void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
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struct radeon_ps *new_ps,
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struct radeon_ps *old_ps)
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{
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struct ni_ps *new_state = ni_get_ps(new_ps);
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struct ni_ps *current_state = ni_get_ps(old_ps);
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if ((new_ps->vclk == old_ps->vclk) &&
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(new_ps->dclk == old_ps->dclk))
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return;
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if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >=
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current_state->performance_levels[current_state->performance_level_count - 1].sclk)
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return;
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radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
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}
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void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
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struct radeon_ps *new_ps,
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struct radeon_ps *old_ps)
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{
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struct ni_ps *new_state = ni_get_ps(new_ps);
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struct ni_ps *current_state = ni_get_ps(old_ps);
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if ((new_ps->vclk == old_ps->vclk) &&
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(new_ps->dclk == old_ps->dclk))
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return;
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if (new_state->performance_levels[new_state->performance_level_count - 1].sclk <
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current_state->performance_levels[current_state->performance_level_count - 1].sclk)
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return;
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radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
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}
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void ni_dpm_setup_asic(struct radeon_device *rdev)
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{
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struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
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@ -3730,7 +3766,7 @@ int ni_dpm_set_power_state(struct radeon_device *rdev)
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DRM_ERROR("ni_restrict_performance_levels_before_switch failed\n");
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return ret;
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}
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rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
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ni_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
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ret = ni_enable_power_containment(rdev, new_ps, false);
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if (ret) {
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DRM_ERROR("ni_enable_power_containment failed\n");
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@ -3780,7 +3816,7 @@ int ni_dpm_set_power_state(struct radeon_device *rdev)
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DRM_ERROR("rv770_set_sw_state failed\n");
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return ret;
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}
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rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
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ni_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
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ret = ni_enable_smc_cac(rdev, new_ps, true);
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if (ret) {
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DRM_ERROR("ni_enable_smc_cac failed\n");
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@ -238,4 +238,11 @@ void ni_update_current_ps(struct radeon_device *rdev,
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void ni_update_requested_ps(struct radeon_device *rdev,
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struct radeon_ps *rps);
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void ni_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
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struct radeon_ps *new_ps,
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struct radeon_ps *old_ps);
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void ni_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
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struct radeon_ps *new_ps,
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struct radeon_ps *old_ps);
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#endif
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