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regulator: Add NXP PF8X00 regulator driver
Add NXP PF8100/PF8121A/PF8200 regulator driver. PF8100/PF8121A/PF8200 is PMIC designed for highperformance consumer applications. It features seven high efficiency buck, four linear and one vsnvs regulators. Tested in Engicam i.Core MX8M Mini SOM platform boards. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Link: https://lore.kernel.org/r/20201130112329.104614-2-jagan@amarulasolutions.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jagan Teki
Mark Brown
parent
4b748fb344
commit
d3795d6321
@ -12559,6 +12559,12 @@ S: Maintained
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F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
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F: drivers/gpu/drm/imx/dcss/
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NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
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F: drivers/regulator/pf8x00-regulator.c
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NXP PTN5150A CC LOGIC AND EXTCON DRIVER
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M: Krzysztof Kozlowski <krzk@kernel.org>
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L: linux-kernel@vger.kernel.org
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@ -812,6 +812,14 @@ config REGULATOR_PCF50633
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Say Y here to support the voltage regulators and converters
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on PCF50633
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config REGULATOR_PF8X00
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tristate "NXP PF8100/PF8121A/PF8200 regulator driver"
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depends on I2C && OF
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select REGMAP_I2C
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help
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Say y here to support the regulators found on the NXP
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PF8100/PF8121A/PF8200 PMIC.
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config REGULATOR_PFUZE100
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tristate "Freescale PFUZE100/200/3000/3001 regulator driver"
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depends on I2C
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@ -102,6 +102,7 @@ obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o
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obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o
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obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o
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obj-$(CONFIG_REGULATOR_PCA9450) += pca9450-regulator.o
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obj-$(CONFIG_REGULATOR_PF8X00) += pf8x00-regulator.o
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obj-$(CONFIG_REGULATOR_PFUZE100) += pfuze100-regulator.o
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obj-$(CONFIG_REGULATOR_PV88060) += pv88060-regulator.o
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obj-$(CONFIG_REGULATOR_PV88080) += pv88080-regulator.o
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496
drivers/regulator/pf8x00-regulator.c
Normal file
496
drivers/regulator/pf8x00-regulator.c
Normal file
@ -0,0 +1,496 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 NXP
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* Copyright (C) 2019 Boundary Devices
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* Copyright (C) 2020 Amarula Solutions(India)
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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/* registers */
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#define PF8X00_DEVICEID 0x00
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#define PF8X00_REVID 0x01
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#define PF8X00_EMREV 0x02
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#define PF8X00_PROGID 0x03
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#define PF8X00_IMS_INT 0x04
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#define PF8X00_IMS_THERM 0x07
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#define PF8X00_SW_MODE_INT 0x0a
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#define PF8X00_SW_MODE_MASK 0x0b
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#define PF8X00_IMS_SW_ILIM 0x12
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#define PF8X00_IMS_LDO_ILIM 0x15
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#define PF8X00_IMS_SW_UV 0x18
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#define PF8X00_IMS_SW_OV 0x1b
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#define PF8X00_IMS_LDO_UV 0x1e
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#define PF8X00_IMS_LDO_OV 0x21
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#define PF8X00_IMS_PWRON 0x24
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#define PF8X00_SYS_INT 0x27
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#define PF8X00_HARD_FAULT 0x29
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#define PF8X00_FSOB_FLAGS 0x2a
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#define PF8X00_FSOB_SELECT 0x2b
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#define PF8X00_ABIST_OV1 0x2c
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#define PF8X00_ABIST_OV2 0x2d
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#define PF8X00_ABIST_UV1 0x2e
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#define PF8X00_ABIST_UV2 0x2f
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#define PF8X00_TEST_FLAGS 0x30
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#define PF8X00_ABIST_RUN 0x31
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#define PF8X00_RANDOM_GEN 0x33
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#define PF8X00_RANDOM_CHK 0x34
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#define PF8X00_VMONEN1 0x35
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#define PF8X00_VMONEN2 0x36
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#define PF8X00_CTRL1 0x37
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#define PF8X00_CTRL2 0x38
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#define PF8X00_CTRL3 0x39
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#define PF8X00_PWRUP_CTRL 0x3a
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#define PF8X00_RESETBMCU 0x3c
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#define PF8X00_PGOOD 0x3d
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#define PF8X00_PWRDN_DLY1 0x3e
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#define PF8X00_PWRDN_DLY2 0x3f
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#define PF8X00_FREQ_CTRL 0x40
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#define PF8X00_COINCELL_CTRL 0x41
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#define PF8X00_PWRON 0x42
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#define PF8X00_WD_CONFIG 0x43
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#define PF8X00_WD_CLEAR 0x44
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#define PF8X00_WD_EXPIRE 0x45
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#define PF8X00_WD_COUNTER 0x46
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#define PF8X00_FAULT_COUNTER 0x47
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#define PF8X00_FSAFE_COUNTER 0x48
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#define PF8X00_FAULT_TIMER 0x49
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#define PF8X00_AMUX 0x4a
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#define PF8X00_SW1_CONFIG1 0x4d
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#define PF8X00_LDO1_CONFIG1 0x85
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#define PF8X00_VSNVS_CONFIG1 0x9d
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#define PF8X00_PAGE_SELECT 0x9f
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/* regulators */
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enum pf8x00_regulators {
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PF8X00_LDO1,
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PF8X00_LDO2,
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PF8X00_LDO3,
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PF8X00_LDO4,
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PF8X00_BUCK1,
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PF8X00_BUCK2,
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PF8X00_BUCK3,
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PF8X00_BUCK4,
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PF8X00_BUCK5,
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PF8X00_BUCK6,
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PF8X00_BUCK7,
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PF8X00_VSNVS,
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PF8X00_MAX_REGULATORS,
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};
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enum pf8x00_buck_states {
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SW_CONFIG1,
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SW_CONFIG2,
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SW_PWRUP,
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SW_MODE1,
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SW_RUN_VOLT,
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SW_STBY_VOLT,
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};
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#define PF8X00_SW_BASE(i) (8 * (i - PF8X00_BUCK1) + PF8X00_SW1_CONFIG1)
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enum pf8x00_ldo_states {
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LDO_CONFIG1,
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LDO_CONFIG2,
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LDO_PWRUP,
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LDO_RUN_VOLT,
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LDO_STBY_VOLT,
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};
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#define PF8X00_LDO_BASE(i) (6 * (i - PF8X00_LDO1) + PF8X00_LDO1_CONFIG1)
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enum swxilim_bits {
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SWXILIM_2100_MA,
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SWXILIM_2600_MA,
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SWXILIM_3000_MA,
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SWXILIM_4500_MA,
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};
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#define PF8X00_SWXILIM_SHIFT 3
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#define PF8X00_SWXILIM_MASK GENMASK(4, 3)
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#define PF8X00_SWXPHASE_MASK GENMASK(2, 0)
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#define PF8X00_SWXPHASE_DEFAULT 0
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#define PF8X00_SWXPHASE_SHIFT 7
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enum pf8x00_devid {
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PF8100 = 0x0,
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PF8121A = BIT(1),
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PF8200 = BIT(3),
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};
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#define PF8X00_FAM BIT(6)
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#define PF8X00_DEVICE_FAM_MASK GENMASK(7, 4)
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#define PF8X00_DEVICE_ID_MASK GENMASK(3, 0)
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struct pf8x00_regulator {
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struct regulator_desc desc;
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u8 ilim;
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u8 phase_shift;
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};
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struct pf8x00_chip {
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struct regmap *regmap;
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struct device *dev;
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};
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static const struct regmap_config pf8x00_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = PF8X00_PAGE_SELECT,
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.cache_type = REGCACHE_RBTREE,
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};
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/* VLDOx output: 1.5V to 5.0V */
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static const int pf8x00_ldo_voltages[] = {
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1500000, 1600000, 1800000, 1850000, 2150000, 2500000, 2800000, 3000000,
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3100000, 3150000, 3200000, 3300000, 3350000, 1650000, 1700000, 5000000,
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};
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#define SWV(i) (6250 * i + 400000)
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#define SWV_LINE(i) SWV(i*8+0), SWV(i*8+1), SWV(i*8+2), SWV(i*8+3), \
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SWV(i*8+4), SWV(i*8+5), SWV(i*8+6), SWV(i*8+7)
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/* Output: 0.4V to 1.8V */
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static const int pf8x00_sw1_to_6_voltages[] = {
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SWV_LINE(0),
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SWV_LINE(1),
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SWV_LINE(2),
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SWV_LINE(3),
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SWV_LINE(4),
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SWV_LINE(5),
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SWV_LINE(6),
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SWV_LINE(7),
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SWV_LINE(8),
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SWV_LINE(9),
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SWV_LINE(10),
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SWV_LINE(11),
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SWV_LINE(12),
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SWV_LINE(13),
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SWV_LINE(14),
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SWV_LINE(15),
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SWV_LINE(16),
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SWV_LINE(17),
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SWV_LINE(18),
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SWV_LINE(19),
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SWV_LINE(20),
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SWV_LINE(21),
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1500000, 1800000,
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};
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/* Output: 1.0V to 4.1V */
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static const int pf8x00_sw7_voltages[] = {
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1000000, 1100000, 1200000, 1250000, 1300000, 1350000, 1500000, 1600000,
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1800000, 1850000, 2000000, 2100000, 2150000, 2250000, 2300000, 2400000,
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2500000, 2800000, 3150000, 3200000, 3250000, 3300000, 3350000, 3400000,
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3500000, 3800000, 4000000, 4100000, 4100000, 4100000, 4100000, 4100000,
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};
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/* Output: 1.8V, 3.0V, or 3.3V */
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static const int pf8x00_vsnvs_voltages[] = {
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0, 1800000, 3000000, 3300000,
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};
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static struct pf8x00_regulator *desc_to_regulator(const struct regulator_desc *desc)
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{
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return container_of(desc, struct pf8x00_regulator, desc);
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}
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static void swxilim_select(const struct regulator_desc *desc, int ilim)
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{
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struct pf8x00_regulator *data = desc_to_regulator(desc);
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u8 ilim_sel;
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switch (ilim) {
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case 2100:
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ilim_sel = SWXILIM_2100_MA;
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break;
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case 2600:
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ilim_sel = SWXILIM_2600_MA;
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break;
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case 3000:
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ilim_sel = SWXILIM_3000_MA;
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break;
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case 4500:
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ilim_sel = SWXILIM_4500_MA;
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break;
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default:
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ilim_sel = SWXILIM_2100_MA;
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break;
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}
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data->ilim = ilim_sel;
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}
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static int pf8x00_of_parse_cb(struct device_node *np,
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const struct regulator_desc *desc,
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struct regulator_config *config)
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{
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struct pf8x00_regulator *data = desc_to_regulator(desc);
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struct pf8x00_chip *chip = config->driver_data;
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int phase;
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int val;
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int ret;
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ret = of_property_read_u32(np, "nxp,ilim-ma", &val);
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if (ret)
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dev_dbg(chip->dev, "unspecified ilim for BUCK%d, use 2100 mA\n",
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desc->id - PF8X00_LDO4);
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swxilim_select(desc, val);
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ret = of_property_read_u32(np, "nxp,phase-shift", &val);
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if (ret) {
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dev_dbg(chip->dev,
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"unspecified phase-shift for BUCK%d, use 0 degrees\n",
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desc->id - PF8X00_LDO4);
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val = PF8X00_SWXPHASE_DEFAULT;
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}
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phase = val / 45;
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if ((phase * 45) != val) {
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dev_warn(config->dev,
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"invalid phase_shift %d for BUCK%d, use 0 degrees\n",
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(phase * 45), desc->id - PF8X00_LDO4);
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phase = PF8X00_SWXPHASE_SHIFT;
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}
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data->phase_shift = (phase >= 1) ? phase - 1 : PF8X00_SWXPHASE_SHIFT;
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return 0;
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}
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static const struct regulator_ops pf8x00_ldo_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.list_voltage = regulator_list_voltage_table,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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};
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static const struct regulator_ops pf8x00_buck_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.list_voltage = regulator_list_voltage_table,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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};
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static const struct regulator_ops pf8x00_vsnvs_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_ascend,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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};
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#define PF8X00LDO(_id, _name, base, voltages) \
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[PF8X00_LDO ## _id] = { \
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.desc = { \
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.name = _name, \
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.of_match = _name, \
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.regulators_node = "regulators", \
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.n_voltages = ARRAY_SIZE(voltages), \
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.ops = &pf8x00_ldo_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = PF8X00_LDO ## _id, \
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.owner = THIS_MODULE, \
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.volt_table = voltages, \
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.vsel_reg = (base) + LDO_RUN_VOLT, \
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.vsel_mask = 0xff, \
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.enable_reg = (base) + LDO_CONFIG2, \
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.enable_val = 0x2, \
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.disable_val = 0x0, \
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.enable_mask = 2, \
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}, \
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}
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#define PF8X00BUCK(_id, _name, base, voltages) \
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[PF8X00_BUCK ## _id] = { \
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.desc = { \
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.name = _name, \
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.of_match = _name, \
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.regulators_node = "regulators", \
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.of_parse_cb = pf8x00_of_parse_cb, \
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.n_voltages = ARRAY_SIZE(voltages), \
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.ops = &pf8x00_buck_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = PF8X00_BUCK ## _id, \
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.owner = THIS_MODULE, \
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.volt_table = voltages, \
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.vsel_reg = (base) + SW_RUN_VOLT, \
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.vsel_mask = 0xff, \
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.enable_reg = (base) + SW_MODE1, \
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.enable_val = 0x3, \
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.disable_val = 0x0, \
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.enable_mask = 0x3, \
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.enable_time = 500, \
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}, \
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}
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#define PF8X00VSNVS(_name, base, voltages) \
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[PF8X00_VSNVS] = { \
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.desc = { \
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.name = _name, \
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.of_match = _name, \
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.regulators_node = "regulators", \
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.n_voltages = ARRAY_SIZE(voltages), \
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.ops = &pf8x00_vsnvs_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = PF8X00_VSNVS, \
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.owner = THIS_MODULE, \
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.volt_table = voltages, \
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.vsel_reg = (base), \
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.vsel_mask = 0x3, \
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}, \
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}
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static struct pf8x00_regulator pf8x00_regulators_data[PF8X00_MAX_REGULATORS] = {
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PF8X00LDO(1, "ldo1", PF8X00_LDO_BASE(PF8X00_LDO1), pf8x00_ldo_voltages),
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PF8X00LDO(2, "ldo2", PF8X00_LDO_BASE(PF8X00_LDO2), pf8x00_ldo_voltages),
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PF8X00LDO(3, "ldo3", PF8X00_LDO_BASE(PF8X00_LDO3), pf8x00_ldo_voltages),
|
||||
PF8X00LDO(4, "ldo4", PF8X00_LDO_BASE(PF8X00_LDO4), pf8x00_ldo_voltages),
|
||||
PF8X00BUCK(1, "buck1", PF8X00_SW_BASE(PF8X00_BUCK1), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(2, "buck2", PF8X00_SW_BASE(PF8X00_BUCK2), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(3, "buck3", PF8X00_SW_BASE(PF8X00_BUCK3), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(4, "buck4", PF8X00_SW_BASE(PF8X00_BUCK4), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(5, "buck5", PF8X00_SW_BASE(PF8X00_BUCK5), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(6, "buck6", PF8X00_SW_BASE(PF8X00_BUCK6), pf8x00_sw1_to_6_voltages),
|
||||
PF8X00BUCK(7, "buck7", PF8X00_SW_BASE(PF8X00_BUCK7), pf8x00_sw7_voltages),
|
||||
PF8X00VSNVS("vsnvs", PF8X00_VSNVS_CONFIG1, pf8x00_vsnvs_voltages),
|
||||
};
|
||||
|
||||
static int pf8x00_identify(struct pf8x00_chip *chip)
|
||||
{
|
||||
unsigned int value;
|
||||
u8 dev_fam, dev_id;
|
||||
const char *name = NULL;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(chip->regmap, PF8X00_DEVICEID, &value);
|
||||
if (ret) {
|
||||
dev_err(chip->dev, "failed to read chip family\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev_fam = value & PF8X00_DEVICE_FAM_MASK;
|
||||
switch (dev_fam) {
|
||||
case PF8X00_FAM:
|
||||
break;
|
||||
default:
|
||||
dev_err(chip->dev,
|
||||
"Chip 0x%x is not from PF8X00 family\n", dev_fam);
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev_id = value & PF8X00_DEVICE_ID_MASK;
|
||||
switch (dev_id) {
|
||||
case PF8100:
|
||||
name = "PF8100";
|
||||
break;
|
||||
case PF8121A:
|
||||
name = "PF8121A";
|
||||
break;
|
||||
case PF8200:
|
||||
name = "PF8100";
|
||||
break;
|
||||
default:
|
||||
dev_err(chip->dev, "Unknown pf8x00 device id 0x%x\n", dev_id);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
dev_info(chip->dev, "%s PMIC found.\n", name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pf8x00_i2c_probe(struct i2c_client *client)
|
||||
{
|
||||
struct regulator_config config = { NULL, };
|
||||
struct pf8x00_chip *chip;
|
||||
int id;
|
||||
int ret;
|
||||
|
||||
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
|
||||
if (!chip)
|
||||
return -ENOMEM;
|
||||
|
||||
i2c_set_clientdata(client, chip);
|
||||
chip->dev = &client->dev;
|
||||
|
||||
chip->regmap = devm_regmap_init_i2c(client, &pf8x00_regmap_config);
|
||||
if (IS_ERR(chip->regmap)) {
|
||||
ret = PTR_ERR(chip->regmap);
|
||||
dev_err(&client->dev,
|
||||
"regmap allocation failed with err %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = pf8x00_identify(chip);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (id = 0; id < ARRAY_SIZE(pf8x00_regulators_data); id++) {
|
||||
struct pf8x00_regulator *data = &pf8x00_regulators_data[id];
|
||||
struct regulator_dev *rdev;
|
||||
|
||||
config.dev = chip->dev;
|
||||
config.driver_data = chip;
|
||||
config.regmap = chip->regmap;
|
||||
|
||||
rdev = devm_regulator_register(&client->dev, &data->desc, &config);
|
||||
if (IS_ERR(rdev)) {
|
||||
dev_err(&client->dev,
|
||||
"failed to register %s regulator\n", data->desc.name);
|
||||
return PTR_ERR(rdev);
|
||||
}
|
||||
|
||||
if ((id >= PF8X00_BUCK1) && (id <= PF8X00_BUCK7)) {
|
||||
u8 reg = PF8X00_SW_BASE(id) + SW_CONFIG2;
|
||||
|
||||
regmap_update_bits(chip->regmap, reg,
|
||||
PF8X00_SWXPHASE_MASK,
|
||||
data->phase_shift);
|
||||
|
||||
regmap_update_bits(chip->regmap, reg,
|
||||
PF8X00_SWXILIM_MASK,
|
||||
data->ilim << PF8X00_SWXILIM_SHIFT);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id pf8x00_dt_ids[] = {
|
||||
{ .compatible = "nxp,pf8x00",},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pf8x00_dt_ids);
|
||||
|
||||
static const struct i2c_device_id pf8x00_i2c_id[] = {
|
||||
{ "pf8x00", 0 },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, pf8x00_i2c_id);
|
||||
|
||||
static struct i2c_driver pf8x00_regulator_driver = {
|
||||
.id_table = pf8x00_i2c_id,
|
||||
.driver = {
|
||||
.name = "pf8x00",
|
||||
.of_match_table = pf8x00_dt_ids,
|
||||
},
|
||||
.probe_new = pf8x00_i2c_probe,
|
||||
};
|
||||
module_i2c_driver(pf8x00_regulator_driver);
|
||||
|
||||
MODULE_AUTHOR("Jagan Teki <jagan@amarulasolutions.com>");
|
||||
MODULE_AUTHOR("Troy Kisky <troy.kisky@boundarydevices.com>");
|
||||
MODULE_DESCRIPTION("Regulator Driver for NXP's PF8100/PF8121A/PF8200 PMIC");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user