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riscv/mm: hugepage's PG_dcache_clean flag is only set in head page

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HugeTLB pages are always fully mapped, so only setting head page's
PG_dcache_clean flag is enough.

Signed-off-by: Tong Tiangen <tongtiangen@huawei.com>
Link: https://lore.kernel.org/lkml/20220331065640.5777-2-songmuchun@bytedance.com/
Link: https://lore.kernel.org/r/20221024094725.3054311-2-tongtiangen@huawei.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Tong Tiangen 2022-10-24 09:47:24 +00:00 committed by Palmer Dabbelt
parent 6925ba3d9b
commit d33deda095
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GPG Key ID: 2E1319F35FBB1889
2 changed files with 14 additions and 0 deletions
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7
arch/riscv/include/asm/cacheflush.h
View File

@ -17,6 +17,13 @@ static inline void local_flush_icache_all(void)
static inline void flush_dcache_page(struct page *page)
{
/*
* HugeTLB pages are always fully mapped and only head page will be
* set PG_dcache_clean (see comments in flush_icache_pte()).
*/
if (PageHuge(page))
page = compound_head(page);
if (test_bit(PG_dcache_clean, &page->flags))
clear_bit(PG_dcache_clean, &page->flags);
}

7
arch/riscv/mm/cacheflush.c
View File

@ -82,6 +82,13 @@ void flush_icache_pte(pte_t pte)
{
struct page *page = pte_page(pte);
/*
* HugeTLB pages are always fully mapped, so only setting head page's
* PG_dcache_clean flag is enough.
*/
if (PageHuge(page))
page = compound_head(page);
if (!test_and_set_bit(PG_dcache_clean, &page->flags))
flush_icache_all();
}