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KVM: selftests: Convert set_sregs_test away from VCPU_ID
Convert set_sregs_test to use vm_create_with_one_vcpu() and pass around a 'struct kvm_vcpu' object instead of using a global VCPU_ID. Note, this is a "functional" change in the sense that the test now creates a vCPU with vcpu_id==0 instead of vcpu_id==5. The non-zero VCPU_ID was 100% arbitrary and added little to no validation coverage. If testing non-zero vCPU IDs is desirable for generic tests, that can be done in the future by tweaking the VM creation helpers. Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -22,9 +22,7 @@
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#include "kvm_util.h"
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#include "processor.h"
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#define VCPU_ID 5
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static void test_cr4_feature_bit(struct kvm_vm *vm, struct kvm_sregs *orig,
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static void test_cr4_feature_bit(struct kvm_vcpu *vcpu, struct kvm_sregs *orig,
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uint64_t feature_bit)
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{
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struct kvm_sregs sregs;
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@ -37,11 +35,11 @@ static void test_cr4_feature_bit(struct kvm_vm *vm, struct kvm_sregs *orig,
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memcpy(&sregs, orig, sizeof(sregs));
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sregs.cr4 |= feature_bit;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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rc = _vcpu_sregs_set(vcpu->vm, vcpu->id, &sregs);
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TEST_ASSERT(rc, "KVM allowed unsupported CR4 bit (0x%lx)", feature_bit);
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/* Sanity check that KVM didn't change anything. */
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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vcpu_sregs_get(vcpu->vm, vcpu->id, &sregs);
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TEST_ASSERT(!memcmp(&sregs, orig, sizeof(sregs)), "KVM modified sregs");
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}
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@ -83,6 +81,7 @@ static uint64_t calc_cr4_feature_bits(struct kvm_vm *vm)
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int main(int argc, char *argv[])
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{
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struct kvm_sregs sregs;
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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uint64_t cr4;
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int rc;
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@ -96,43 +95,43 @@ int main(int argc, char *argv[])
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* the vCPU model, i.e. without doing KVM_SET_CPUID2.
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*/
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vm = vm_create_barebones();
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vm_vcpu_add(vm, VCPU_ID);
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vcpu = vm_vcpu_add(vm, 0);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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vcpu_sregs_get(vm, vcpu->id, &sregs);
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sregs.cr4 |= calc_cr4_feature_bits(vm);
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cr4 = sregs.cr4;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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rc = _vcpu_sregs_set(vm, vcpu->id, &sregs);
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TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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vcpu_sregs_get(vm, vcpu->id, &sregs);
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TEST_ASSERT(sregs.cr4 == cr4, "sregs.CR4 (0x%llx) != CR4 (0x%lx)",
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sregs.cr4, cr4);
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/* Verify all unsupported features are rejected by KVM. */
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test_cr4_feature_bit(vm, &sregs, X86_CR4_UMIP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_LA57);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_VMXE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMXE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_FSGSBASE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_PCIDE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_OSXSAVE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMEP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMAP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_PKE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_UMIP);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_LA57);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_VMXE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMXE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_FSGSBASE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PCIDE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_OSXSAVE);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMEP);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_SMAP);
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test_cr4_feature_bit(vcpu, &sregs, X86_CR4_PKE);
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kvm_vm_free(vm);
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/* Create a "real" VM and verify APIC_BASE can be set. */
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vm = vm_create_default(VCPU_ID, 0, NULL);
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vm = vm_create_with_one_vcpu(&vcpu, NULL);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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vcpu_sregs_get(vm, vcpu->id, &sregs);
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sregs.apic_base = 1 << 10;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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rc = _vcpu_sregs_set(vm, vcpu->id, &sregs);
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TEST_ASSERT(rc, "Set IA32_APIC_BASE to %llx (invalid)",
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sregs.apic_base);
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sregs.apic_base = 1 << 11;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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rc = _vcpu_sregs_set(vm, vcpu->id, &sregs);
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TEST_ASSERT(!rc, "Couldn't set IA32_APIC_BASE to %llx (valid)",
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sregs.apic_base);
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