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iommu/arm-smmu: Add a stream map entry iterator
We iterate over the SMEs associated with a master config quite a lot in various places, and are about to do so even more. Let's wrap the idiom in a handy iterator macro before the repetition gets out of hand. Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -324,6 +324,8 @@ struct arm_smmu_master_cfg {
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s16 smendx[MAX_MASTER_STREAMIDS];
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};
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#define INVALID_SMENDX -1
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#define for_each_cfg_sme(cfg, i, idx) \
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for (i = 0; idx = cfg->smendx[i], i < cfg->num_streamids; ++i)
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struct arm_smmu_device {
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struct device *dev;
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@ -1090,8 +1092,8 @@ static int arm_smmu_master_alloc_smes(struct arm_smmu_device *smmu,
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int i, idx;
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/* Allocate the SMRs on the SMMU */
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for (i = 0; i < cfg->num_streamids; ++i) {
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if (cfg->smendx[i] != INVALID_SMENDX)
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for_each_cfg_sme(cfg, i, idx) {
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if (idx != INVALID_SMENDX)
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return -EEXIST;
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/* ...except on stream indexing hardware, of course */
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@ -1115,8 +1117,8 @@ static int arm_smmu_master_alloc_smes(struct arm_smmu_device *smmu,
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return 0;
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/* It worked! Now, poke the actual hardware */
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for (i = 0; i < cfg->num_streamids; ++i)
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arm_smmu_write_smr(smmu, cfg->smendx[i]);
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for_each_cfg_sme(cfg, i, idx)
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arm_smmu_write_smr(smmu, idx);
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return 0;
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@ -1131,15 +1133,13 @@ err_free_smrs:
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static void arm_smmu_master_free_smes(struct arm_smmu_master_cfg *cfg)
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{
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struct arm_smmu_device *smmu = cfg->smmu;
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int i;
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int i, idx;
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/*
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* We *must* clear the S2CR first, because freeing the SMR means
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* that it can be re-allocated immediately.
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*/
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for (i = 0; i < cfg->num_streamids; ++i) {
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int idx = cfg->smendx[i];
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for_each_cfg_sme(cfg, i, idx) {
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/* An IOMMU group is torn down by the first device to be removed */
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if (idx == INVALID_SMENDX)
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return;
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@ -1151,9 +1151,9 @@ static void arm_smmu_master_free_smes(struct arm_smmu_master_cfg *cfg)
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__iowmb();
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/* Invalidate the SMRs before freeing back to the allocator */
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for (i = 0; i < cfg->num_streamids; ++i) {
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for_each_cfg_sme(cfg, i, idx) {
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if (smmu->smrs)
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arm_smmu_free_smr(smmu, cfg->smendx[i]);
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arm_smmu_free_smr(smmu, idx);
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cfg->smendx[i] = INVALID_SMENDX;
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}
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@ -1162,7 +1162,7 @@ static void arm_smmu_master_free_smes(struct arm_smmu_master_cfg *cfg)
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static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain,
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struct arm_smmu_master_cfg *cfg)
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{
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int i, ret = 0;
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int i, idx, ret = 0;
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struct arm_smmu_device *smmu = smmu_domain->smmu;
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struct arm_smmu_s2cr *s2cr = smmu->s2crs;
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enum arm_smmu_s2cr_type type = S2CR_TYPE_TRANS;
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@ -1182,9 +1182,7 @@ static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain,
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if (smmu_domain->domain.type == IOMMU_DOMAIN_DMA)
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type = S2CR_TYPE_BYPASS;
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for (i = 0; i < cfg->num_streamids; ++i) {
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int idx = cfg->smendx[i];
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for_each_cfg_sme(cfg, i, idx) {
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/* Devices in an IOMMU group may already be configured */
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if (type == s2cr[idx].type && cbndx == s2cr[idx].cbndx)
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break;
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