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[ARM] 4887/1: i.MXC family: Separate current platform code
From: Juergen Beisert <j.beisert@pengutronix.de> This patch separates the current code into i.MX2 and i.MX3 and modifies the Kconfig files to reflect this separation in the menus. Things happend since last review: - make i.MX3 compile again - fix some structure names to be conform with all the shared/common sources from i.MX1/i.MX2 Previous changes: - stay conform to other Kconfig files (note from Russell King) Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -4,7 +4,7 @@ menu "Freescale MXC Implementations"
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choice
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prompt "MXC/iMX System Type"
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default 0
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default ARCH_MX3
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config ARCH_MX3
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bool "MX3-based"
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@ -13,34 +13,19 @@
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#include <asm/sizes.h>
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#include <asm/arch/mx31.h>
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#ifdef CONFIG_ARCH_MX3
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# include <asm/arch/mx31.h>
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#endif
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#include <asm/arch/mxc.h>
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#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM)
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/*
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* ---------------------------------------------------------------------------
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* Board specific defines
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* ---------------------------------------------------------------------------
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*/
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#define MXC_EXP_IO_BASE (MXC_GPIO_INT_BASE + MXC_MAX_GPIO_LINES)
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#include <asm/arch/board-mx31ads.h>
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#ifndef MXC_MAX_EXP_IO_LINES
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#define MXC_MAX_EXP_IO_LINES 0
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#ifdef CONFIG_MACH_MX31ADS
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# include <asm/arch/board-mx31ads.h>
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#endif
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#define MXC_MAX_VIRTUAL_INTS 16
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#define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
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#define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE
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#define MXC_SDIO2_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 1)
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#define MXC_SDIO3_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 2)
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#define MXC_MAX_INTS (MXC_MAX_INT_LINES + \
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MXC_MAX_GPIO_LINES + \
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MXC_MAX_EXP_IO_LINES + \
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MXC_MAX_VIRTUAL_INTS)
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#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
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@ -19,7 +19,9 @@
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#define MXC_GPIO_TO_IRQ(x) (MXC_GPIO_INT_BASE + x)
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/* Number of normal interrupts */
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#define NR_IRQS MXC_MAX_INTS
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#define NR_IRQS (MXC_MAX_INT_LINES + \
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MXC_MAX_GPIO_LINES + \
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MXC_MAX_VIRTUAL_INTS)
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/* Number of fast interrupts */
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#define NR_FIQS MXC_MAX_INTS
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@ -317,6 +317,8 @@
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#define MXC_MAX_INT_LINES 64
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#define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES
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#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM)
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#define MXC_MAX_VIRTUAL_INTS 16
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/*!
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* Number of GPIO port as defined in the IC Spec
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@ -329,7 +331,33 @@
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#define PROD_SIGNATURE 0x1 /* For MX31 */
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/* silicon revisions specific to i.MX31 */
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#define CHIP_REV_1_0 0x10
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#define CHIP_REV_1_1 0x11
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#define CHIP_REV_1_2 0x12
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#define CHIP_REV_1_3 0x13
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#define CHIP_REV_2_0 0x20
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#define CHIP_REV_2_1 0x21
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#define CHIP_REV_2_2 0x22
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#define CHIP_REV_2_3 0x23
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#define CHIP_REV_3_0 0x30
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#define CHIP_REV_3_1 0x31
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#define CHIP_REV_3_2 0x32
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#define SYSTEM_REV_MIN CHIP_REV_1_0
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#define SYSTEM_REV_NUM 3
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#endif /* __ASM_ARCH_MXC_MX31_H__ */
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#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
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/* this is a i.MX31 CPU */
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#define cpu_is_mx31() (1)
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extern unsigned int system_rev;
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static inline int mx31_revision(void)
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{
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return system_rev;
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}
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#endif
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#endif /* __ASM_ARCH_MXC_MX31_H__ */
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@ -15,6 +15,11 @@
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#error "Do not include directly."
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#endif
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/* clean up all things that are not used */
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#ifndef CONFIG_ARCH_MX3
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# define cpu_is_mx31() (0)
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#endif
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/*
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*****************************************
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* GPT Register definitions *
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