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Staging/IIO fixes for 5.10-rc5
Here are some small Staging and IIO driver fixes for 5.10-rc5. They include: - IIO fixes for reported regressions and problems - new device ids for IIO drivers - new device id for rtl8723bs driver - staging ralink driver Kconfig dependency fix - staging mt7621-pci bus resource fix All of these have been in linux-next all week with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCX7pN0A8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymnAACgrCPVrnWr2mblmLhBWYpq3LjLri0AoIsYd7FG 138ClPlHDOjNTzKQaF5Q =YLIp -----END PGP SIGNATURE----- Merge tag 'staging-5.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging and IIO fixes from Greg KH: "Here are some small Staging and IIO driver fixes for 5.10-rc5. They include: - IIO fixes for reported regressions and problems - new device ids for IIO drivers - new device id for rtl8723bs driver - staging ralink driver Kconfig dependency fix - staging mt7621-pci bus resource fix All of these have been in linux-next all week with no reported issues" * tag 'staging-5.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio: accel: kxcjk1013: Add support for KIOX010A ACPI DSM for setting tablet-mode iio: accel: kxcjk1013: Replace is_smo8500_device with an acpi_type enum docs: ABI: testing: iio: stm32: remove re-introduced unsupported ABI iio: light: fix kconfig dependency bug for VCNL4035 iio/adc: ingenic: Fix AUX/VBAT readings when touchscreen is used iio/adc: ingenic: Fix battery VREF for JZ4770 SoC staging: rtl8723bs: Add 024c:0627 to the list of SDIO device-ids staging: ralink-gdma: fix kconfig dependency bug for DMA_RALINK staging: mt7621-pci: avoid to request pci bus resources iio: imu: st_lsm6dsx: set 10ms as min shub slave timeout counter/ti-eqep: Fix regmap max_register iio: adc: stm32-adc: fix a regression when using dma and irq iio: adc: mediatek: fix unset field iio: cros_ec: Use default frequencies when EC returns invalid information
This commit is contained in:
Linus Torvalds
commit
d27637ece8
@ -109,30 +109,6 @@ Description:
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When counting down the counter start from preset value
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and fire event when reach 0.
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What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
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KernelVersion: 4.12
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Contact: benjamin.gaignard@st.com
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Description:
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Reading returns the list possible quadrature modes.
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What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
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KernelVersion: 4.12
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Contact: benjamin.gaignard@st.com
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Description:
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Configure the device counter quadrature modes:
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channel_A:
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Encoder A input servers as the count input and B as
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the UP/DOWN direction control input.
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channel_B:
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Encoder B input serves as the count input and A as
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the UP/DOWN direction control input.
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quadrature:
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Encoder A and B inputs are mixed to get direction
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and count with a scale of 0.25.
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What: /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available
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KernelVersion: 4.12
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Contact: benjamin.gaignard@st.com
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@ -368,7 +368,7 @@ static const struct regmap_config ti_eqep_regmap32_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x24,
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.max_register = QUPRD,
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};
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static const struct regmap_config ti_eqep_regmap16_config = {
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@ -376,7 +376,7 @@ static const struct regmap_config ti_eqep_regmap16_config = {
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.reg_bits = 16,
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.val_bits = 16,
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.reg_stride = 2,
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.max_register = 0x1e,
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.max_register = QCPRDLAT,
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};
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static int ti_eqep_probe(struct platform_device *pdev)
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@ -126,6 +126,12 @@ enum kx_chipset {
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KX_MAX_CHIPS /* this must be last */
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};
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enum kx_acpi_type {
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ACPI_GENERIC,
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ACPI_SMO8500,
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ACPI_KIOX010A,
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};
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struct kxcjk1013_data {
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struct i2c_client *client;
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struct iio_trigger *dready_trig;
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@ -143,7 +149,7 @@ struct kxcjk1013_data {
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bool motion_trigger_on;
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int64_t timestamp;
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enum kx_chipset chipset;
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bool is_smo8500_device;
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enum kx_acpi_type acpi_type;
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};
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enum kxcjk1013_axis {
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@ -270,6 +276,32 @@ static const struct {
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{19163, 1, 0},
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{38326, 0, 1} };
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#ifdef CONFIG_ACPI
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enum kiox010a_fn_index {
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KIOX010A_SET_LAPTOP_MODE = 1,
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KIOX010A_SET_TABLET_MODE = 2,
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};
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static int kiox010a_dsm(struct device *dev, int fn_index)
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{
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acpi_handle handle = ACPI_HANDLE(dev);
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guid_t kiox010a_dsm_guid;
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union acpi_object *obj;
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if (!handle)
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return -ENODEV;
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guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
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obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
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if (!obj)
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return -EIO;
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ACPI_FREE(obj);
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return 0;
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}
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#endif
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static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
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enum kxcjk1013_mode mode)
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{
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@ -347,6 +379,13 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
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{
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int ret;
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#ifdef CONFIG_ACPI
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if (data->acpi_type == ACPI_KIOX010A) {
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/* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
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kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
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}
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#endif
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ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading who_am_i\n");
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@ -1247,7 +1286,7 @@ static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
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static const char *kxcjk1013_match_acpi_device(struct device *dev,
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enum kx_chipset *chipset,
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bool *is_smo8500_device)
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enum kx_acpi_type *acpi_type)
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{
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const struct acpi_device_id *id;
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@ -1256,7 +1295,9 @@ static const char *kxcjk1013_match_acpi_device(struct device *dev,
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return NULL;
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if (strcmp(id->id, "SMO8500") == 0)
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*is_smo8500_device = true;
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*acpi_type = ACPI_SMO8500;
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else if (strcmp(id->id, "KIOX010A") == 0)
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*acpi_type = ACPI_KIOX010A;
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*chipset = (enum kx_chipset)id->driver_data;
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@ -1299,7 +1340,7 @@ static int kxcjk1013_probe(struct i2c_client *client,
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} else if (ACPI_HANDLE(&client->dev)) {
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name = kxcjk1013_match_acpi_device(&client->dev,
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&data->chipset,
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&data->is_smo8500_device);
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&data->acpi_type);
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} else
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return -ENODEV;
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@ -1316,7 +1357,7 @@ static int kxcjk1013_probe(struct i2c_client *client,
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &kxcjk1013_info;
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if (client->irq > 0 && !data->is_smo8500_device) {
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if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
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ret = devm_request_threaded_irq(&client->dev, client->irq,
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kxcjk1013_data_rdy_trig_poll,
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kxcjk1013_event_handler,
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@ -71,7 +71,7 @@
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#define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10
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#define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986)
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#define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12
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#define JZ4770_ADC_BATTERY_VREF 6600
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#define JZ4770_ADC_BATTERY_VREF 1200
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#define JZ4770_ADC_BATTERY_VREF_BITS 12
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#define JZ_ADC_IRQ_AUX BIT(0)
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@ -177,13 +177,12 @@ static void ingenic_adc_set_config(struct ingenic_adc *adc,
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mutex_unlock(&adc->lock);
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}
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static void ingenic_adc_enable(struct ingenic_adc *adc,
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int engine,
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bool enabled)
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static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
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int engine,
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bool enabled)
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{
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u8 val;
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mutex_lock(&adc->lock);
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val = readb(adc->base + JZ_ADC_REG_ENABLE);
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if (enabled)
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@ -192,20 +191,41 @@ static void ingenic_adc_enable(struct ingenic_adc *adc,
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val &= ~BIT(engine);
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writeb(val, adc->base + JZ_ADC_REG_ENABLE);
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}
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static void ingenic_adc_enable(struct ingenic_adc *adc,
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int engine,
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bool enabled)
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{
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mutex_lock(&adc->lock);
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ingenic_adc_enable_unlocked(adc, engine, enabled);
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mutex_unlock(&adc->lock);
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}
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static int ingenic_adc_capture(struct ingenic_adc *adc,
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int engine)
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{
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u32 cfg;
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u8 val;
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int ret;
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ingenic_adc_enable(adc, engine, true);
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/*
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* Disable CMD_SEL temporarily, because it causes wrong VBAT readings,
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* probably due to the switch of VREF. We must keep the lock here to
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* avoid races with the buffer enable/disable functions.
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*/
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mutex_lock(&adc->lock);
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cfg = readl(adc->base + JZ_ADC_REG_CFG);
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writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
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ingenic_adc_enable_unlocked(adc, engine, true);
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ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,
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!(val & BIT(engine)), 250, 1000);
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if (ret)
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ingenic_adc_enable(adc, engine, false);
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ingenic_adc_enable_unlocked(adc, engine, false);
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writel(cfg, adc->base + JZ_ADC_REG_CFG);
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mutex_unlock(&adc->lock);
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return ret;
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}
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@ -9,9 +9,9 @@
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include <linux/iopoll.h>
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#include <linux/io.h>
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#include <linux/iio/iio.h>
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@ -276,6 +276,8 @@ static int mt6577_auxadc_probe(struct platform_device *pdev)
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goto err_disable_clk;
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}
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adc_dev->dev_comp = device_get_match_data(&pdev->dev);
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mutex_init(&adc_dev->lock);
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mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
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@ -41,18 +41,16 @@
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* struct stm32_adc_common_regs - stm32 common registers
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* @csr: common status register offset
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* @ccr: common control register offset
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* @eoc1_msk: adc1 end of conversion flag in @csr
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* @eoc2_msk: adc2 end of conversion flag in @csr
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* @eoc3_msk: adc3 end of conversion flag in @csr
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* @eoc_msk: array of eoc (end of conversion flag) masks in csr for adc1..n
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* @ovr_msk: array of ovr (overrun flag) masks in csr for adc1..n
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* @ier: interrupt enable register offset for each adc
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* @eocie_msk: end of conversion interrupt enable mask in @ier
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*/
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struct stm32_adc_common_regs {
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u32 csr;
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u32 ccr;
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u32 eoc1_msk;
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u32 eoc2_msk;
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u32 eoc3_msk;
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u32 eoc_msk[STM32_ADC_MAX_ADCS];
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u32 ovr_msk[STM32_ADC_MAX_ADCS];
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u32 ier;
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u32 eocie_msk;
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};
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@ -282,21 +280,20 @@ out:
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static const struct stm32_adc_common_regs stm32f4_adc_common_regs = {
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.csr = STM32F4_ADC_CSR,
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.ccr = STM32F4_ADC_CCR,
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.eoc1_msk = STM32F4_EOC1 | STM32F4_OVR1,
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.eoc2_msk = STM32F4_EOC2 | STM32F4_OVR2,
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.eoc3_msk = STM32F4_EOC3 | STM32F4_OVR3,
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.eoc_msk = { STM32F4_EOC1, STM32F4_EOC2, STM32F4_EOC3},
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.ovr_msk = { STM32F4_OVR1, STM32F4_OVR2, STM32F4_OVR3},
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.ier = STM32F4_ADC_CR1,
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.eocie_msk = STM32F4_EOCIE | STM32F4_OVRIE,
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.eocie_msk = STM32F4_EOCIE,
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};
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/* STM32H7 common registers definitions */
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static const struct stm32_adc_common_regs stm32h7_adc_common_regs = {
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.csr = STM32H7_ADC_CSR,
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.ccr = STM32H7_ADC_CCR,
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.eoc1_msk = STM32H7_EOC_MST | STM32H7_OVR_MST,
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.eoc2_msk = STM32H7_EOC_SLV | STM32H7_OVR_SLV,
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.eoc_msk = { STM32H7_EOC_MST, STM32H7_EOC_SLV},
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.ovr_msk = { STM32H7_OVR_MST, STM32H7_OVR_SLV},
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.ier = STM32H7_ADC_IER,
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.eocie_msk = STM32H7_EOCIE | STM32H7_OVRIE,
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.eocie_msk = STM32H7_EOCIE,
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};
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static const unsigned int stm32_adc_offset[STM32_ADC_MAX_ADCS] = {
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@ -318,6 +315,7 @@ static void stm32_adc_irq_handler(struct irq_desc *desc)
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{
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struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int i;
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u32 status;
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chained_irq_enter(chip, desc);
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@ -335,17 +333,12 @@ static void stm32_adc_irq_handler(struct irq_desc *desc)
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* before invoking the interrupt handler (e.g. call ISR only for
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* IRQ-enabled ADCs).
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*/
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if (status & priv->cfg->regs->eoc1_msk &&
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stm32_adc_eoc_enabled(priv, 0))
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generic_handle_irq(irq_find_mapping(priv->domain, 0));
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if (status & priv->cfg->regs->eoc2_msk &&
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stm32_adc_eoc_enabled(priv, 1))
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generic_handle_irq(irq_find_mapping(priv->domain, 1));
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if (status & priv->cfg->regs->eoc3_msk &&
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stm32_adc_eoc_enabled(priv, 2))
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generic_handle_irq(irq_find_mapping(priv->domain, 2));
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for (i = 0; i < priv->cfg->num_irqs; i++) {
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if ((status & priv->cfg->regs->eoc_msk[i] &&
|
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stm32_adc_eoc_enabled(priv, i)) ||
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(status & priv->cfg->regs->ovr_msk[i]))
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generic_handle_irq(irq_find_mapping(priv->domain, i));
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}
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chained_irq_exit(chip, desc);
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};
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@ -154,6 +154,7 @@ struct stm32_adc;
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* @start_conv: routine to start conversions
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* @stop_conv: routine to stop conversions
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* @unprepare: optional unprepare routine (disable, power-down)
|
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* @irq_clear: routine to clear irqs
|
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* @smp_cycles: programmable sampling time (ADC clock cycles)
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*/
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struct stm32_adc_cfg {
|
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@ -166,6 +167,7 @@ struct stm32_adc_cfg {
|
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void (*start_conv)(struct iio_dev *, bool dma);
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void (*stop_conv)(struct iio_dev *);
|
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void (*unprepare)(struct iio_dev *);
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void (*irq_clear)(struct iio_dev *indio_dev, u32 msk);
|
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const unsigned int *smp_cycles;
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};
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@ -621,6 +623,13 @@ static void stm32f4_adc_stop_conv(struct iio_dev *indio_dev)
|
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STM32F4_ADON | STM32F4_DMA | STM32F4_DDS);
|
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}
|
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|
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static void stm32f4_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
|
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{
|
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struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
|
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stm32_adc_clr_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);
|
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}
|
||||
|
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static void stm32h7_adc_start_conv(struct iio_dev *indio_dev, bool dma)
|
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{
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
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@ -659,6 +668,13 @@ static void stm32h7_adc_stop_conv(struct iio_dev *indio_dev)
|
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stm32_adc_clr_bits(adc, STM32H7_ADC_CFGR, STM32H7_DMNGT_MASK);
|
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}
|
||||
|
||||
static void stm32h7_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
|
||||
{
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
/* On STM32H7 IRQs are cleared by writing 1 into ISR register */
|
||||
stm32_adc_set_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);
|
||||
}
|
||||
|
||||
static int stm32h7_adc_exit_pwr_down(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
@ -1235,17 +1251,40 @@ static int stm32_adc_read_raw(struct iio_dev *indio_dev,
|
||||
}
|
||||
}
|
||||
|
||||
static void stm32_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
|
||||
{
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
|
||||
adc->cfg->irq_clear(indio_dev, msk);
|
||||
}
|
||||
|
||||
static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
|
||||
{
|
||||
struct iio_dev *indio_dev = data;
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
const struct stm32_adc_regspec *regs = adc->cfg->regs;
|
||||
u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
|
||||
u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
|
||||
|
||||
if (status & regs->isr_ovr.mask)
|
||||
/* Check ovr status right now, as ovr mask should be already disabled */
|
||||
if (status & regs->isr_ovr.mask) {
|
||||
/*
|
||||
* Clear ovr bit to avoid subsequent calls to IRQ handler.
|
||||
* This requires to stop ADC first. OVR bit state in ISR,
|
||||
* is propaged to CSR register by hardware.
|
||||
*/
|
||||
adc->cfg->stop_conv(indio_dev);
|
||||
stm32_adc_irq_clear(indio_dev, regs->isr_ovr.mask);
|
||||
dev_err(&indio_dev->dev, "Overrun, stopping: restart needed\n");
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
if (!(status & mask))
|
||||
dev_err_ratelimited(&indio_dev->dev,
|
||||
"Unexpected IRQ: IER=0x%08x, ISR=0x%08x\n",
|
||||
mask, status);
|
||||
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
static irqreturn_t stm32_adc_isr(int irq, void *data)
|
||||
@ -1254,6 +1293,10 @@ static irqreturn_t stm32_adc_isr(int irq, void *data)
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
const struct stm32_adc_regspec *regs = adc->cfg->regs;
|
||||
u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
|
||||
u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
|
||||
|
||||
if (!(status & mask))
|
||||
return IRQ_WAKE_THREAD;
|
||||
|
||||
if (status & regs->isr_ovr.mask) {
|
||||
/*
|
||||
@ -2046,6 +2089,7 @@ static const struct stm32_adc_cfg stm32f4_adc_cfg = {
|
||||
.start_conv = stm32f4_adc_start_conv,
|
||||
.stop_conv = stm32f4_adc_stop_conv,
|
||||
.smp_cycles = stm32f4_adc_smp_cycles,
|
||||
.irq_clear = stm32f4_adc_irq_clear,
|
||||
};
|
||||
|
||||
static const struct stm32_adc_cfg stm32h7_adc_cfg = {
|
||||
@ -2057,6 +2101,7 @@ static const struct stm32_adc_cfg stm32h7_adc_cfg = {
|
||||
.prepare = stm32h7_adc_prepare,
|
||||
.unprepare = stm32h7_adc_unprepare,
|
||||
.smp_cycles = stm32h7_adc_smp_cycles,
|
||||
.irq_clear = stm32h7_adc_irq_clear,
|
||||
};
|
||||
|
||||
static const struct stm32_adc_cfg stm32mp1_adc_cfg = {
|
||||
@ -2069,6 +2114,7 @@ static const struct stm32_adc_cfg stm32mp1_adc_cfg = {
|
||||
.prepare = stm32h7_adc_prepare,
|
||||
.unprepare = stm32h7_adc_unprepare,
|
||||
.smp_cycles = stm32h7_adc_smp_cycles,
|
||||
.irq_clear = stm32h7_adc_irq_clear,
|
||||
};
|
||||
|
||||
static const struct of_device_id stm32_adc_of_match[] = {
|
||||
|
||||
@ -256,7 +256,7 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
|
||||
struct cros_ec_sensorhub *sensor_hub = dev_get_drvdata(dev->parent);
|
||||
struct cros_ec_dev *ec = sensor_hub->ec;
|
||||
struct cros_ec_sensor_platform *sensor_platform = dev_get_platdata(dev);
|
||||
u32 ver_mask;
|
||||
u32 ver_mask, temp;
|
||||
int frequencies[ARRAY_SIZE(state->frequencies) / 2] = { 0 };
|
||||
int ret, i;
|
||||
|
||||
@ -311,10 +311,16 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
|
||||
&frequencies[2],
|
||||
&state->fifo_max_event_count);
|
||||
} else {
|
||||
frequencies[1] = state->resp->info_3.min_frequency;
|
||||
frequencies[2] = state->resp->info_3.max_frequency;
|
||||
state->fifo_max_event_count =
|
||||
state->resp->info_3.fifo_max_event_count;
|
||||
if (state->resp->info_3.max_frequency == 0) {
|
||||
get_default_min_max_freq(state->resp->info.type,
|
||||
&frequencies[1],
|
||||
&frequencies[2],
|
||||
&temp);
|
||||
} else {
|
||||
frequencies[1] = state->resp->info_3.min_frequency;
|
||||
frequencies[2] = state->resp->info_3.max_frequency;
|
||||
}
|
||||
state->fifo_max_event_count = state->resp->info_3.fifo_max_event_count;
|
||||
}
|
||||
for (i = 0; i < ARRAY_SIZE(frequencies); i++) {
|
||||
state->frequencies[2 * i] = frequencies[i] / 1000;
|
||||
|
||||
@ -156,11 +156,13 @@ static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = {
|
||||
static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw)
|
||||
{
|
||||
struct st_lsm6dsx_sensor *sensor;
|
||||
u32 odr;
|
||||
u32 odr, timeout;
|
||||
|
||||
sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
|
||||
odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 12500;
|
||||
msleep((2000000U / odr) + 1);
|
||||
/* set 10ms as minimum timeout for i2c slave configuration */
|
||||
timeout = max_t(u32, 2000000U / odr + 1, 10);
|
||||
msleep(timeout);
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -544,6 +544,7 @@ config VCNL4000
|
||||
|
||||
config VCNL4035
|
||||
tristate "VCNL4035 combined ALS and proximity sensor"
|
||||
select IIO_BUFFER
|
||||
select IIO_TRIGGERED_BUFFER
|
||||
select REGMAP_I2C
|
||||
depends on I2C
|
||||
|
||||
@ -653,16 +653,11 @@ static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt7621_pcie_request_resources(struct mt7621_pcie *pcie,
|
||||
struct list_head *res)
|
||||
static void mt7621_pcie_add_resources(struct mt7621_pcie *pcie,
|
||||
struct list_head *res)
|
||||
{
|
||||
struct device *dev = pcie->dev;
|
||||
|
||||
pci_add_resource_offset(res, &pcie->io, pcie->offset.io);
|
||||
pci_add_resource_offset(res, &pcie->mem, pcie->offset.mem);
|
||||
pci_add_resource(res, &pcie->busn);
|
||||
|
||||
return devm_request_pci_bus_resources(dev, res);
|
||||
}
|
||||
|
||||
static int mt7621_pcie_register_host(struct pci_host_bridge *host,
|
||||
@ -738,11 +733,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
|
||||
|
||||
setup_cm_memory_region(pcie);
|
||||
|
||||
err = mt7621_pcie_request_resources(pcie, &res);
|
||||
if (err) {
|
||||
dev_err(dev, "Error requesting resources\n");
|
||||
return err;
|
||||
}
|
||||
mt7621_pcie_add_resources(pcie, &res);
|
||||
|
||||
err = mt7621_pcie_register_host(bridge, &res);
|
||||
if (err) {
|
||||
|
||||
@ -2,6 +2,7 @@
|
||||
config DMA_RALINK
|
||||
tristate "RALINK DMA support"
|
||||
depends on RALINK && !SOC_RT288X
|
||||
depends on DMADEVICES
|
||||
select DMA_ENGINE
|
||||
select DMA_VIRTUAL_CHANNELS
|
||||
|
||||
|
||||
@ -20,6 +20,7 @@ static const struct sdio_device_id sdio_ids[] = {
|
||||
{ SDIO_DEVICE(0x024c, 0x0525), },
|
||||
{ SDIO_DEVICE(0x024c, 0x0623), },
|
||||
{ SDIO_DEVICE(0x024c, 0x0626), },
|
||||
{ SDIO_DEVICE(0x024c, 0x0627), },
|
||||
{ SDIO_DEVICE(0x024c, 0xb723), },
|
||||
{ /* end: all zeroes */ },
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user