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powerpc/time: Move timebase functions into new asm/vdso/timebase.h
In order to easily use get_tb() from C VDSO, move timebase functions into a new header named asm/vdso/timebase.h Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20201126131006.2431205-3-mpe@ellerman.id.au
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@ -1419,37 +1419,6 @@ static inline void msr_check_and_clear(unsigned long bits)
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__msr_check_and_clear(bits);
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}
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#if defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)
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#define mftb() ({unsigned long rval; \
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asm volatile( \
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"90: mfspr %0, %2;\n" \
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ASM_FTR_IFSET( \
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"97: cmpwi %0,0;\n" \
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" beq- 90b;\n", "", %1) \
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: "=r" (rval) \
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: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \
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rval;})
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#elif defined(CONFIG_PPC_8xx)
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#define mftb() ({unsigned long rval; \
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asm volatile("mftbl %0" : "=r" (rval)); rval;})
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#else
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#define mftb() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : \
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"=r" (rval) : "i" (SPRN_TBRL)); rval;})
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#endif /* !CONFIG_PPC_CELL */
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#if defined(CONFIG_PPC_8xx)
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#define mftbu() ({unsigned long rval; \
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asm volatile("mftbu %0" : "=r" (rval)); rval;})
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#else
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#define mftbu() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : "=r" (rval) : \
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"i" (SPRN_TBRU)); rval;})
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#endif
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#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
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#define mttbu(v) asm volatile("mttbu %0":: "r"(v))
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#ifdef CONFIG_PPC32
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#define mfsrin(v) ({unsigned int rval; \
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asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \
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@ -15,6 +15,7 @@
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#include <asm/processor.h>
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#include <asm/cpu_has_feature.h>
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#include <asm/vdso/timebase.h>
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/* time.c */
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extern unsigned long tb_ticks_per_jiffy;
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@ -38,12 +39,6 @@ struct div_result {
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u64 result_low;
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};
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/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
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static inline unsigned long get_tbl(void)
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{
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return mftb();
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}
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static inline u64 get_vtb(void)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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@ -53,29 +48,6 @@ static inline u64 get_vtb(void)
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return 0;
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}
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static inline u64 get_tb(void)
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{
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unsigned int tbhi, tblo, tbhi2;
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if (IS_ENABLED(CONFIG_PPC64))
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return mftb();
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do {
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tbhi = mftbu();
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tblo = mftb();
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tbhi2 = mftbu();
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} while (tbhi != tbhi2);
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return ((u64)tbhi << 32) | tblo;
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}
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static inline void set_tb(unsigned int upper, unsigned int lower)
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{
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mtspr(SPRN_TBWL, 0);
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mtspr(SPRN_TBWU, upper);
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mtspr(SPRN_TBWL, lower);
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}
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/* Accessor functions for the decrementer register.
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* The 4xx doesn't even have a decrementer. I tried to use the
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* generic timer interrupt code, which seems OK, with the 4xx PIT
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@ -9,7 +9,7 @@
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*/
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#include <asm/cputable.h>
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#include <asm/reg.h>
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#include <asm/vdso/timebase.h>
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#define CLOCK_TICK_RATE 1024000 /* Underlying HZ */
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71
arch/powerpc/include/asm/vdso/timebase.h
Normal file
71
arch/powerpc/include/asm/vdso/timebase.h
Normal file
@ -0,0 +1,71 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Common timebase prototypes and such for all ppc machines.
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*/
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#ifndef _ASM_POWERPC_VDSO_TIMEBASE_H
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#define _ASM_POWERPC_VDSO_TIMEBASE_H
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#include <asm/reg.h>
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#if defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)
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#define mftb() ({unsigned long rval; \
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asm volatile( \
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"90: mfspr %0, %2;\n" \
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ASM_FTR_IFSET( \
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"97: cmpwi %0,0;\n" \
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" beq- 90b;\n", "", %1) \
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: "=r" (rval) \
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: "i" (CPU_FTR_CELL_TB_BUG), "i" (SPRN_TBRL) : "cr0"); \
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rval;})
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#elif defined(CONFIG_PPC_8xx)
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#define mftb() ({unsigned long rval; \
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asm volatile("mftbl %0" : "=r" (rval)); rval;})
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#else
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#define mftb() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : \
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"=r" (rval) : "i" (SPRN_TBRL)); rval;})
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#endif /* !CONFIG_PPC_CELL */
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#if defined(CONFIG_PPC_8xx)
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#define mftbu() ({unsigned long rval; \
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asm volatile("mftbu %0" : "=r" (rval)); rval;})
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#else
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#define mftbu() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : "=r" (rval) : \
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"i" (SPRN_TBRU)); rval;})
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#endif
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#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
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#define mttbu(v) asm volatile("mttbu %0":: "r"(v))
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/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
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static inline unsigned long get_tbl(void)
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{
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return mftb();
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}
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static inline u64 get_tb(void)
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{
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unsigned int tbhi, tblo, tbhi2;
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if (IS_ENABLED(CONFIG_PPC64))
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return mftb();
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do {
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tbhi = mftbu();
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tblo = mftb();
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tbhi2 = mftbu();
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} while (tbhi != tbhi2);
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return ((u64)tbhi << 32) | tblo;
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}
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static inline void set_tb(unsigned int upper, unsigned int lower)
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{
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mtspr(SPRN_TBWL, 0);
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mtspr(SPRN_TBWU, upper);
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mtspr(SPRN_TBWL, lower);
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}
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#endif /* _ASM_POWERPC_VDSO_TIMEBASE_H */
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