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ASoC: Merge up fixes due to dependency with new changes
Future ES8326 changes depend on already applied fixes, merge up the fixes so we can do the new things.
This commit is contained in:
Mark Brown
commit
d24255f0a1
186
sound/soc/codecs/es8326.c
Executable file → Normal file
186
sound/soc/codecs/es8326.c
Executable file → Normal file
@ -45,6 +45,82 @@ struct es8326_priv {
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int jack_remove_retry;
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};
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static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h &= 0x20;
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crosstalk_l &= 0xf0;
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crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
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ucontrol->value.integer.value[0] = crosstalk;
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return 0;
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}
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static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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crosstalk = ucontrol->value.integer.value[0];
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h = (crosstalk & 0x10) << 1;
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crosstalk_l &= 0x0f;
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crosstalk_l |= (crosstalk & 0x0f) << 4;
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regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
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0x20, crosstalk_h);
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regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
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return 0;
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}
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static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h &= 0x10;
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crosstalk_l &= 0x0f;
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crosstalk = crosstalk_h | crosstalk_l;
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ucontrol->value.integer.value[0] = crosstalk;
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return 0;
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}
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static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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crosstalk = ucontrol->value.integer.value[0];
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h = crosstalk & 0x10;
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crosstalk_l &= 0xf0;
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crosstalk_l |= crosstalk & 0x0f;
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regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
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0x10, crosstalk_h);
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regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
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return 0;
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}
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
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@ -102,6 +178,10 @@ static const struct snd_kcontrol_new es8326_snd_controls[] = {
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SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
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0, 0x0f, 0, drc_target_tlv),
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SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
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es8326_crosstalk1_get, es8326_crosstalk1_set),
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SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
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es8326_crosstalk2_get, es8326_crosstalk2_set),
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};
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static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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@ -117,12 +197,6 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
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/* ADC Digital Mute */
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SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0),
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/* Analog Power Supply*/
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SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
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SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
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@ -142,15 +216,10 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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};
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static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
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{"ADC L1", NULL, "MIC1"},
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{"ADC R1", NULL, "MIC2"},
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{"ADC L2", NULL, "MIC3"},
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{"ADC R2", NULL, "MIC4"},
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{"ADC L", NULL, "ADC L1"},
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{"ADC R", NULL, "ADC R1"},
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{"ADC L", NULL, "ADC L2"},
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{"ADC R", NULL, "ADC R2"},
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{"ADC L", NULL, "MIC1"},
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{"ADC R", NULL, "MIC2"},
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{"ADC L", NULL, "MIC3"},
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{"ADC R", NULL, "MIC4"},
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{"I2S OUT", NULL, "ADC L"},
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{"I2S OUT", NULL, "ADC R"},
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@ -440,10 +509,16 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
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unsigned int offset_l, offset_r;
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if (mute) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ES8326_MUTE);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0);
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ES8326_MUTE);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
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0x30, 0x00);
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} else {
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regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
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0x0F, 0x0F);
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}
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} else {
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if (!es8326->calibrated) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
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@ -456,11 +531,22 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
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regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
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es8326->calibrated = true;
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}
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
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regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91);
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ~(ES8326_MUTE));
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
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usleep_range(1000, 5000);
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regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
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usleep_range(1000, 5000);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ~(ES8326_MUTE));
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} else {
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msleep(300);
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regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
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0x0F, 0x00);
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}
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}
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return 0;
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}
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@ -477,23 +563,20 @@ static int es8326_set_bias_level(struct snd_soc_component *codec,
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if (ret)
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return ret;
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regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
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regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
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usleep_range(5000, 10000);
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regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
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regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
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(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
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regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
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regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
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regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
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regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);
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regmap_update_bits(es8326->regmap, ES8326_RESET,
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ES8326_CSM_ON, ES8326_CSM_ON);
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regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
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break;
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case SND_SOC_BIAS_PREPARE:
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break;
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case SND_SOC_BIAS_STANDBY:
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regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
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regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00);
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regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
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regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
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break;
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@ -513,7 +596,7 @@ static const struct snd_soc_dai_ops es8326_ops = {
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.set_fmt = es8326_set_dai_fmt,
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.set_sysclk = es8326_set_dai_sysclk,
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.mute_stream = es8326_mute,
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.no_capture_mute = 1,
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.no_capture_mute = 0,
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};
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static struct snd_soc_dai_driver es8326_dai = {
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@ -672,6 +755,8 @@ static void es8326_jack_detect_handler(struct work_struct *work)
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es8326->hp = 0;
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}
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regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
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regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
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/*
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* Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
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*/
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@ -695,8 +780,11 @@ static void es8326_jack_detect_handler(struct work_struct *work)
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* Don't report jack status.
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*/
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regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
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es8326_enable_micbias(es8326->component);
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usleep_range(50000, 70000);
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regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
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regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
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queue_delayed_work(system_wq, &es8326->jack_detect_work,
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msecs_to_jiffies(400));
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es8326->hp = 1;
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@ -736,13 +824,10 @@ exit:
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static irqreturn_t es8326_irq(int irq, void *dev_id)
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{
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struct es8326_priv *es8326 = dev_id;
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struct snd_soc_component *comp = es8326->component;
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if (!es8326->jack)
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goto out;
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es8326_enable_micbias(comp);
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if (es8326->jack->status & SND_JACK_HEADSET)
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queue_delayed_work(system_wq, &es8326->jack_detect_work,
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msecs_to_jiffies(10));
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@ -766,14 +851,14 @@ static int es8326_calibrate(struct snd_soc_component *component)
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if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {
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dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
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regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
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regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01);
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regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
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regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
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regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
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regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
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regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
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regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
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regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
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regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);
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regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
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regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
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usleep_range(15000, 20000);
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regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
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@ -814,13 +899,13 @@ static int es8326_resume(struct snd_soc_component *component)
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/* reset internal clock state */
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regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
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regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
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regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
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usleep_range(10000, 15000);
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regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);
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regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b);
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regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb);
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/* set headphone default type and detect pin */
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regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
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regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
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regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
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/* set internal oscillator as clock source of headpone cp */
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regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
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@ -828,14 +913,15 @@ static int es8326_resume(struct snd_soc_component *component)
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/* clock manager reset release */
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regmap_write(es8326->regmap, ES8326_RESET, 0x17);
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/* set headphone detection as half scan mode */
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regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
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regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
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regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
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/* enable headphone driver */
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regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
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usleep_range(2000, 5000);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
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regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
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@ -844,6 +930,8 @@ static int es8326_resume(struct snd_soc_component *component)
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regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
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/* calibrate for B version */
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es8326_calibrate(component);
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regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
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regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
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/* turn off headphone out */
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regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
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/* set ADC and DAC in low power mode */
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@ -856,6 +944,14 @@ static int es8326_resume(struct snd_soc_component *component)
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regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
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regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
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regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
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((es8326->version == ES8326_VERSION_B) ?
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(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
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(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
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usleep_range(5000, 10000);
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es8326_enable_micbias(es8326->component);
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usleep_range(50000, 70000);
|
||||
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_INT_SOURCE,
|
||||
(ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
|
||||
regmap_write(es8326->regmap, ES8326_INTOUT_IO,
|
||||
@ -864,7 +960,7 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
|
||||
regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
|
||||
regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
|
||||
ES8326_MIC1_SEL);
|
||||
@ -872,11 +968,7 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
|
||||
ES8326_MUTE);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
|
||||
((es8326->version == ES8326_VERSION_B) ?
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
|
||||
regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11);
|
||||
regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
|
||||
|
||||
es8326->jack_remove_retry = 0;
|
||||
es8326->hp = 0;
|
||||
|
||||
@ -72,6 +72,7 @@
|
||||
#define ES8326_DAC_VOL 0x50
|
||||
#define ES8326_DRC_RECOVERY 0x53
|
||||
#define ES8326_DRC_WINSIZE 0x54
|
||||
#define ES8326_DAC_CROSSTALK 0x55
|
||||
#define ES8326_HPJACK_TIMER 0x56
|
||||
#define ES8326_HPDET_TYPE 0x57
|
||||
#define ES8326_INT_SOURCE 0x58
|
||||
@ -100,7 +101,7 @@
|
||||
#define ES8326_MUTE (3 << 0)
|
||||
|
||||
/* ES8326_CLK_CTL */
|
||||
#define ES8326_CLK_ON (0x7f << 0)
|
||||
#define ES8326_CLK_ON (0x7e << 0)
|
||||
#define ES8326_CLK_OFF (0 << 0)
|
||||
|
||||
/* ES8326_CLK_INV */
|
||||
|
||||
@ -1584,7 +1584,6 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
u16 gain_reg;
|
||||
u16 reg;
|
||||
int val;
|
||||
int offset_val = 0;
|
||||
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
|
||||
|
||||
if (w->shift == WSA_MACRO_COMP1) {
|
||||
@ -1623,10 +1622,8 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
CDC_WSA_RX1_RX_PATH_MIX_SEC0,
|
||||
CDC_WSA_RX_PGA_HALF_DB_MASK,
|
||||
CDC_WSA_RX_PGA_HALF_DB_ENABLE);
|
||||
offset_val = -2;
|
||||
}
|
||||
val = snd_soc_component_read(component, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(component, gain_reg, val);
|
||||
wsa_macro_config_ear_spkr_gain(component, wsa,
|
||||
event, gain_reg);
|
||||
@ -1654,10 +1651,6 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
CDC_WSA_RX1_RX_PATH_MIX_SEC0,
|
||||
CDC_WSA_RX_PGA_HALF_DB_MASK,
|
||||
CDC_WSA_RX_PGA_HALF_DB_DISABLE);
|
||||
offset_val = 2;
|
||||
val = snd_soc_component_read(component, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(component, gain_reg, val);
|
||||
}
|
||||
wsa_macro_config_ear_spkr_gain(component, wsa,
|
||||
event, gain_reg);
|
||||
|
||||
@ -3033,7 +3033,6 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w,
|
||||
{
|
||||
struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
|
||||
u16 gain_reg;
|
||||
int offset_val = 0;
|
||||
int val = 0;
|
||||
|
||||
switch (w->reg) {
|
||||
@ -3073,7 +3072,6 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w,
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
val = snd_soc_component_read(comp, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(comp, gain_reg, val);
|
||||
break;
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
@ -3294,7 +3292,6 @@ static int wcd9335_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
u16 gain_reg;
|
||||
u16 reg;
|
||||
int val;
|
||||
int offset_val = 0;
|
||||
|
||||
if (!(snd_soc_dapm_widget_name_cmp(w, "RX INT0 INTERP"))) {
|
||||
reg = WCD9335_CDC_RX0_RX_PATH_CTL;
|
||||
@ -3337,7 +3334,6 @@ static int wcd9335_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
wcd9335_config_compander(comp, w->shift, event);
|
||||
val = snd_soc_component_read(comp, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(comp, gain_reg, val);
|
||||
break;
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
|
||||
@ -1098,7 +1098,11 @@ static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const DECLARE_TLV_DB_SCALE(pa_gain, -300, 150, -300);
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain,
|
||||
0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0),
|
||||
15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0),
|
||||
30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0),
|
||||
);
|
||||
|
||||
static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
|
||||
@ -32,12 +32,14 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
|
||||
case WSA_CODEC_DMA_RX_0:
|
||||
case WSA_CODEC_DMA_RX_1:
|
||||
/*
|
||||
* set limit of 0dB on Digital Volume for Speakers,
|
||||
* this can prevent damage of speakers to some extent without
|
||||
* active speaker protection
|
||||
* Set limit of -3 dB on Digital Volume and 0 dB on PA Volume
|
||||
* to reduce the risk of speaker damage until we have active
|
||||
* speaker protection in place.
|
||||
*/
|
||||
snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 84);
|
||||
snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 84);
|
||||
snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 81);
|
||||
snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 81);
|
||||
snd_soc_limit_volume(card, "SpkrLeft PA Volume", 17);
|
||||
snd_soc_limit_volume(card, "SpkrRight PA Volume", 17);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user