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iommu/amd: Remove the unused device errata code

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The device errata mechism is entirely unused, so remove it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Link: https://lore.kernel.org/r/20210402143312.372386-2-hch@lst.de
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Christoph Hellwig 2021-04-02 16:33:09 +02:00 committed by Joerg Roedel
parent 3e84f878b5
commit d151c85c52
3 changed files with 3 additions and 72 deletions
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1
drivers/iommu/amd/amd_iommu_types.h
View File

@ -693,7 +693,6 @@ struct iommu_dev_data {
} ats; /* ATS state */ } ats; /* ATS state */
bool pri_tlp; /* PASID TLB required for bool pri_tlp; /* PASID TLB required for
PPR completions */ PPR completions */
u32 errata; /* Bitmap for errata to apply */
bool use_vapic; /* Enable device to use vapic mode */ bool use_vapic; /* Enable device to use vapic mode */
bool defer_attach; bool defer_attach;

56
drivers/iommu/amd/iommu.c
View File

@ -290,15 +290,6 @@ static bool pci_iommuv2_capable(struct pci_dev *pdev)
return true; return true;
} }
static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum)
{
struct iommu_dev_data *dev_data;
dev_data = dev_iommu_priv_get(&pdev->dev);
return dev_data->errata & (1 << erratum) ? true : false;
}
/* /*
* This function checks if the driver got a valid device from the caller to * This function checks if the driver got a valid device from the caller to
* avoid dereferencing invalid pointers. * avoid dereferencing invalid pointers.
@ -1531,33 +1522,9 @@ static void pdev_iommuv2_disable(struct pci_dev *pdev)
pci_disable_pasid(pdev); pci_disable_pasid(pdev);
} }
/* FIXME: Change generic reset-function to do the same */
static int pri_reset_while_enabled(struct pci_dev *pdev)
{
u16 control;
int pos;
pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
if (!pos)
return -EINVAL;
pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
control |= PCI_PRI_CTRL_RESET;
pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
return 0;
}
static int pdev_iommuv2_enable(struct pci_dev *pdev) static int pdev_iommuv2_enable(struct pci_dev *pdev)
{ {
bool reset_enable; int ret;
int reqs, ret;
/* FIXME: Hardcode number of outstanding requests for now */
reqs = 32;
if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE))
reqs = 1;
reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET);
/* Only allow access to user-accessible pages */ /* Only allow access to user-accessible pages */
ret = pci_enable_pasid(pdev, 0); ret = pci_enable_pasid(pdev, 0);
@ -1570,16 +1537,11 @@ static int pdev_iommuv2_enable(struct pci_dev *pdev)
goto out_err; goto out_err;
/* Enable PRI */ /* Enable PRI */
ret = pci_enable_pri(pdev, reqs); /* FIXME: Hardcode number of outstanding requests for now */
ret = pci_enable_pri(pdev, 32);
if (ret) if (ret)
goto out_err; goto out_err;
if (reset_enable) {
ret = pri_reset_while_enabled(pdev);
if (ret)
goto out_err;
}
ret = pci_enable_ats(pdev, PAGE_SHIFT); ret = pci_enable_ats(pdev, PAGE_SHIFT);
if (ret) if (ret)
goto out_err; goto out_err;
@ -2594,18 +2556,6 @@ struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev)
} }
EXPORT_SYMBOL(amd_iommu_get_v2_domain); EXPORT_SYMBOL(amd_iommu_get_v2_domain);
void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum)
{
struct iommu_dev_data *dev_data;
if (!amd_iommu_v2_supported())
return;
dev_data = dev_iommu_priv_get(&pdev->dev);
dev_data->errata |= (1 << erratum);
}
EXPORT_SYMBOL(amd_iommu_enable_device_erratum);
int amd_iommu_device_info(struct pci_dev *pdev, int amd_iommu_device_info(struct pci_dev *pdev,
struct amd_iommu_device_info *info) struct amd_iommu_device_info *info)
{ {

18
include/linux/amd-iommu.h
View File

@ -32,24 +32,6 @@ struct pci_dev;
extern int amd_iommu_detect(void); extern int amd_iommu_detect(void);
extern int amd_iommu_init_hardware(void); extern int amd_iommu_init_hardware(void);
/**
* amd_iommu_enable_device_erratum() - Enable erratum workaround for device
* in the IOMMUv2 driver
* @pdev: The PCI device the workaround is necessary for
* @erratum: The erratum workaround to enable
*
* The function needs to be called before amd_iommu_init_device().
* Possible values for the erratum number are for now:
* - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
* is enabled
* - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
* requests to one
*/
#define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
#define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
/** /**
* amd_iommu_init_device() - Init device for use with IOMMUv2 driver * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
* @pdev: The PCI device to initialize * @pdev: The PCI device to initialize