dmaengine: pl330: Make sure the debug is idle before doing DMAGO

According to the datasheet of pl330:

Example 2-1 Using DMAGO with the debug instruction registers

1. Create a program for the DMA channel
2. Store the program in a region of system memory
3. Poll the DBGSTATUS Register to ensure that the debug is idle
4. Write to the DBGINST0 Register
5. Write to the DBGINST1 Register
6. Write zero to the DBGCMD Register

so, we should make sure the debug is idle before step 4/5/6, not
only step 6. if not, there maybe a risk that fail to write DBGINST0/1.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Link: https://lore.kernel.org/r/1591234598-78919-1-git-send-email-sugar.zhang@rock-chips.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Sugar Zhang 2020-06-04 09:36:38 +08:00 committed by Vinod Koul
parent 0705107fcc
commit d12ea5591e

View File

@ -885,6 +885,12 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
void __iomem *regs = thrd->dmac->base; void __iomem *regs = thrd->dmac->base;
u32 val; u32 val;
/* If timed out due to halted state-machine */
if (_until_dmac_idle(thrd)) {
dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n");
return;
}
val = (insn[0] << 16) | (insn[1] << 24); val = (insn[0] << 16) | (insn[1] << 24);
if (!as_manager) { if (!as_manager) {
val |= (1 << 0); val |= (1 << 0);
@ -895,12 +901,6 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
val = le32_to_cpu(*((__le32 *)&insn[2])); val = le32_to_cpu(*((__le32 *)&insn[2]));
writel(val, regs + DBGINST1); writel(val, regs + DBGINST1);
/* If timed out due to halted state-machine */
if (_until_dmac_idle(thrd)) {
dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n");
return;
}
/* Get going */ /* Get going */
writel(0, regs + DBGCMD); writel(0, regs + DBGCMD);
} }