korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-11 04:18:39 +08:00
Code Issues Packages Projects Releases Wiki Activity

ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity

Browse Source 
On LoongArch based systems, the PCI devices (e.g. SATA controllers and
PCI-to-PCI bridge controllers) in Loongson chipsets output high-level
interrupt signal to the interrupt controller they are connected (see
Loongson 7A1000 Bridge User Manual v2.00, sec 5.3, "For the bridge chip,
AC97 DMA interrupts are edge triggered, gpio interrupts can be configured
to be level triggered or edge triggered as needed, and the rest of the
interrupts are level triggered and active high."), while the IRQs are
active low from the perspective of PCI (see Conventional PCI spec r3.0,
sec 2.2.6, "Interrupts on PCI are optional and defined as level sensitive,
asserted low."), which means that the interrupt output of PCI devices plugged
into PCI-to-PCI bridges of Loongson chipset will be also converted to high-level.
So high level triggered type is required to be passed to acpi_register_gsi()
when creating mappings for PCI devices.

Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221022075955.11726-2-lvjianmin@loongson.cn
This commit is contained in:
Jianmin Lv 2022-10-22 15:59:52 +08:00 committed by Marc Zyngier
parent 247f34f7b8
commit d0c50cc4b9
1 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/acpi/pci_irq.c
View File

@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
u8 pin; u8 pin;
int triggering = ACPI_LEVEL_SENSITIVE; int triggering = ACPI_LEVEL_SENSITIVE;
/* /*
* On ARM systems with the GIC interrupt model, level interrupts * On ARM systems with the GIC interrupt model, or LoongArch
* systems with the LPIC interrupt model, level interrupts
* are always polarity high by specification; PCI legacy * are always polarity high by specification; PCI legacy
* IRQs lines are inverted before reaching the interrupt * IRQs lines are inverted before reaching the interrupt
* controller and must therefore be considered active high * controller and must therefore be considered active high
* as default. * as default.
*/ */
int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ? int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW; ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
char *link = NULL; char *link = NULL;
char link_desc[16]; char link_desc[16];