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powerpc/64s/idle: Consolidate power9_offline_stop()/power9_idle_stop()

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Commit 3d4fbffdd7 ("powerpc/64s/idle: POWER9 implement a separate
idle stop function for hotplug") that added power9_offline_stop() was
written before commit 7672691a08 ("powerpc/powernv: Provide a way to
force a core into SMT4 mode").

When merging the former I failed to notice that it caused us to skip
the force-SMT4 logic for offline CPUs. The result is that offlined
CPUs will not correctly participate in the force-SMT4 logic, which
presumably will result in badness (not tested).

Reconcile the two commits by making power9_offline_stop() a pre-cursor
to power9_idle_stop(), so that they share the force-SMT4 logic.

This is based on an original commit from Nick, all breakage is my own.

Fixes: 3d4fbffdd7 ("powerpc/64s/idle: POWER9 implement a separate idle stop function for hotplug")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Michael Ellerman 2018-04-04 09:01:08 +10:00
parent f2748bdfe1
commit d0b791c029
1 changed files with 11 additions and 12 deletions
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23
arch/powerpc/kernel/idle_book3s.S
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@ -422,25 +422,24 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
/* /*
* Entered with MSR[EE]=0 and no soft-masked interrupts pending. * Entered with MSR[EE]=0 and no soft-masked interrupts pending.
* r3 contains desired PSSCR register value. * r3 contains desired PSSCR register value.
*
* Offline (CPU unplug) case also must notify KVM that the CPU is
* idle.
*/ */
_GLOBAL(power9_offline_stop) _GLOBAL(power9_offline_stop)
std r3, PACA_REQ_PSSCR(r13)
mtspr SPRN_PSSCR,r3
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
/* Tell KVM we're entering idle */ /*
* Tell KVM we're entering idle.
* This does not have to be done in real mode because the P9 MMU
* is independent per-thread. Some steppings share radix/hash mode
* between threads, but in that case KVM has a barrier sync in real
* mode before and after switching between radix and hash.
*/
li r4,KVM_HWTHREAD_IN_IDLE li r4,KVM_HWTHREAD_IN_IDLE
/* DO THIS IN REAL MODE! See comment above. */
stb r4,HSTATE_HWTHREAD_STATE(r13) stb r4,HSTATE_HWTHREAD_STATE(r13)
#endif #endif
LOAD_REG_ADDR(r4,power_enter_stop) /* fall through */
b pnv_powersave_common
/* No return */
/*
* Entered with MSR[EE]=0 and no soft-masked interrupts pending.
* r3 contains desired PSSCR register value.
*/
_GLOBAL(power9_idle_stop) _GLOBAL(power9_idle_stop)
std r3, PACA_REQ_PSSCR(r13) std r3, PACA_REQ_PSSCR(r13)
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE