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Merge branch 'mlxsw-fixes-for-spectrum-4'
Petr Machata says: ==================== mlxsw: Fixes for Spectrum-4 This patchset contains an assortment of fixes for mlxsw Spectrum-4 support. ==================== Link: https://lore.kernel.org/r/cover.1692268427.git.petrm@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
cfceccca01
@ -32,8 +32,8 @@ static const struct mlxsw_afk_element_info mlxsw_afk_element_infos[] = {
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MLXSW_AFK_ELEMENT_INFO_U32(IP_TTL_, 0x18, 0, 8),
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MLXSW_AFK_ELEMENT_INFO_U32(IP_TTL_, 0x18, 0, 8),
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MLXSW_AFK_ELEMENT_INFO_U32(IP_ECN, 0x18, 9, 2),
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MLXSW_AFK_ELEMENT_INFO_U32(IP_ECN, 0x18, 9, 2),
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MLXSW_AFK_ELEMENT_INFO_U32(IP_DSCP, 0x18, 11, 6),
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MLXSW_AFK_ELEMENT_INFO_U32(IP_DSCP, 0x18, 11, 6),
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MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_MSB, 0x18, 17, 3),
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MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_MSB, 0x18, 17, 4),
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MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_LSB, 0x18, 20, 8),
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MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_LSB, 0x18, 21, 8),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_96_127, 0x20, 4),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_96_127, 0x20, 4),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_64_95, 0x24, 4),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_64_95, 0x24, 4),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_32_63, 0x28, 4),
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MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_32_63, 0x28, 4),
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@ -517,11 +517,15 @@ static void mlxsw_pci_skb_cb_ts_set(struct mlxsw_pci *mlxsw_pci,
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struct sk_buff *skb,
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struct sk_buff *skb,
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enum mlxsw_pci_cqe_v cqe_v, char *cqe)
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enum mlxsw_pci_cqe_v cqe_v, char *cqe)
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{
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{
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u8 ts_type;
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if (cqe_v != MLXSW_PCI_CQE_V2)
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if (cqe_v != MLXSW_PCI_CQE_V2)
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return;
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return;
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if (mlxsw_pci_cqe2_time_stamp_type_get(cqe) !=
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ts_type = mlxsw_pci_cqe2_time_stamp_type_get(cqe);
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MLXSW_PCI_CQE_TIME_STAMP_TYPE_UTC)
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if (ts_type != MLXSW_PCI_CQE_TIME_STAMP_TYPE_UTC &&
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ts_type != MLXSW_PCI_CQE_TIME_STAMP_TYPE_MIRROR_UTC)
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return;
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return;
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mlxsw_skb_cb(skb)->cqe_ts.sec = mlxsw_pci_cqe2_time_stamp_sec_get(cqe);
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mlxsw_skb_cb(skb)->cqe_ts.sec = mlxsw_pci_cqe2_time_stamp_sec_get(cqe);
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@ -97,14 +97,6 @@ MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
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*/
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*/
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MLXSW_ITEM32_LP(reg, sspr, 0x00, 16, 0x00, 12);
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MLXSW_ITEM32_LP(reg, sspr, 0x00, 16, 0x00, 12);
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/* reg_sspr_sub_port
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* Virtual port within the physical port.
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* Should be set to 0 when virtual ports are not enabled on the port.
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*
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* Access: RW
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*/
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MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
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/* reg_sspr_system_port
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/* reg_sspr_system_port
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* Unique identifier within the stacking domain that represents all the ports
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* Unique identifier within the stacking domain that represents all the ports
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* that are available in the system (external ports).
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* that are available in the system (external ports).
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@ -120,7 +112,6 @@ static inline void mlxsw_reg_sspr_pack(char *payload, u16 local_port)
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MLXSW_REG_ZERO(sspr, payload);
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MLXSW_REG_ZERO(sspr, payload);
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mlxsw_reg_sspr_m_set(payload, 1);
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mlxsw_reg_sspr_m_set(payload, 1);
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mlxsw_reg_sspr_local_port_set(payload, local_port);
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mlxsw_reg_sspr_local_port_set(payload, local_port);
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mlxsw_reg_sspr_sub_port_set(payload, 0);
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mlxsw_reg_sspr_system_port_set(payload, local_port);
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mlxsw_reg_sspr_system_port_set(payload, local_port);
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}
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}
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@ -193,7 +193,7 @@ mlxsw_sp2_mr_tcam_rule_parse(struct mlxsw_sp_acl_rule *rule,
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key->vrid, GENMASK(7, 0));
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key->vrid, GENMASK(7, 0));
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mlxsw_sp_acl_rulei_keymask_u32(rulei,
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mlxsw_sp_acl_rulei_keymask_u32(rulei,
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MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,
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MLXSW_AFK_ELEMENT_VIRT_ROUTER_MSB,
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key->vrid >> 8, GENMASK(2, 0));
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key->vrid >> 8, GENMASK(3, 0));
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switch (key->proto) {
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switch (key->proto) {
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case MLXSW_SP_L3_PROTO_IPV4:
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case MLXSW_SP_L3_PROTO_IPV4:
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return mlxsw_sp2_mr_tcam_rule_parse4(rulei, key);
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return mlxsw_sp2_mr_tcam_rule_parse4(rulei, key);
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@ -171,7 +171,7 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_2[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4[] = {
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 24, 8),
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 24, 8),
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_MSB, 0x00, 0, 3),
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MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER_MSB, 0x00, 0, 3, 0, true),
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};
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};
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_0[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_0[] = {
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@ -321,7 +321,7 @@ static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5b[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4b[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_4b[] = {
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 13, 8),
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_LSB, 0x04, 13, 8),
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MLXSW_AFK_ELEMENT_INST_EXT_U32(VIRT_ROUTER_MSB, 0x04, 21, 4, 0, true),
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MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER_MSB, 0x04, 21, 4),
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};
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};
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2b[] = {
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static struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv6_2b[] = {
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@ -98,12 +98,12 @@ sb_occ_etc_check()
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port_pool_test()
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port_pool_test()
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{
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{
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local exp_max_occ=288
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local exp_max_occ=$(devlink_cell_size_get)
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local max_occ
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local max_occ
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devlink sb occupancy clearmax $DEVLINK_DEV
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devlink sb occupancy clearmax $DEVLINK_DEV
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$MZ $h1 -c 1 -p 160 -a $h1mac -b $h2mac -A 192.0.1.1 -B 192.0.1.2 \
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$MZ $h1 -c 1 -p 10 -a $h1mac -b $h2mac -A 192.0.1.1 -B 192.0.1.2 \
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-t ip -q
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-t ip -q
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devlink sb occupancy snapshot $DEVLINK_DEV
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devlink sb occupancy snapshot $DEVLINK_DEV
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@ -126,12 +126,12 @@ port_pool_test()
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port_tc_ip_test()
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port_tc_ip_test()
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{
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{
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local exp_max_occ=288
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local exp_max_occ=$(devlink_cell_size_get)
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local max_occ
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local max_occ
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devlink sb occupancy clearmax $DEVLINK_DEV
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devlink sb occupancy clearmax $DEVLINK_DEV
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$MZ $h1 -c 1 -p 160 -a $h1mac -b $h2mac -A 192.0.1.1 -B 192.0.1.2 \
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$MZ $h1 -c 1 -p 10 -a $h1mac -b $h2mac -A 192.0.1.1 -B 192.0.1.2 \
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-t ip -q
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-t ip -q
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devlink sb occupancy snapshot $DEVLINK_DEV
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devlink sb occupancy snapshot $DEVLINK_DEV
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@ -154,16 +154,12 @@ port_tc_ip_test()
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port_tc_arp_test()
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port_tc_arp_test()
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{
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{
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local exp_max_occ=96
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local exp_max_occ=$(devlink_cell_size_get)
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local max_occ
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local max_occ
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if [[ $MLXSW_CHIP != "mlxsw_spectrum" ]]; then
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exp_max_occ=144
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fi
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devlink sb occupancy clearmax $DEVLINK_DEV
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devlink sb occupancy clearmax $DEVLINK_DEV
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$MZ $h1 -c 1 -p 160 -a $h1mac -A 192.0.1.1 -t arp -q
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$MZ $h1 -c 1 -p 10 -a $h1mac -A 192.0.1.1 -t arp -q
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devlink sb occupancy snapshot $DEVLINK_DEV
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devlink sb occupancy snapshot $DEVLINK_DEV
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